289 research outputs found
Development and evaluation of prototypes for the ATLAS ITk pixel detector
The ATLAS inner detector will be replaced by an all-silicon detector for the HL-LHC upgrade around 2025. The innermost five layers of the detector system will be pixel detector layers which will be most challenging in terms of radiation hardness, data rate and readout speed. A serial power scheme will be used for the pixel layers to reduce the material budget and power consumption in cables. New elements are required to operate and monitor a serially powered detector including a detector control system, constant current sources and front-end electronics with shunt regulators. Prototypes for all sections of the ITk pixel detector are built to verify the concept and operate multiple serial power chains as a system test. The evaluation of both the readout of multi-modules and mechanical integration are further aims of the prototyping campaign. In the contribution, results will be presented of this prototyping effort. Moreover, details and features of serial powering for full detector systems will be given
Evaluation of a Serial Powering Scheme and its Building Blocks for the ATLAS ITk Pixel Detector
The high luminosity upgrade for the Large Hadron Collider (LHC) at CERN requires a complete redesign of the current inner detectors of ATLAS and CMS. These new inner detectors will consist of all-silicon tracking detectors, combining multiple layers of silicon hybrid pixel modules and strip detectors. In the new pixel detectors conservative powering schemes are not feasible anymore. Instead serial powering has been chosen as a baseline powering scheme for both the future ATLAS and CMS pixel detectors. In serial powering, multiple detector modules are powered by a constant supply current. This new powering scheme provides challenges for the electrical and mechanical design, from the readout chip to system level considerations.
The main building block of the serial powering scheme foreseen for the ATLAS ITk pixel detector is the shunt low dropout voltage regulator (Shunt-LDO). The Shunt-LDO generates the local supply voltages for each pixel module from the constant supply current while shunting any excess current not drawn by the readout chips. In this thesis the Shunt-LDO is extensively characterised and evaluated. The expanding feature set of the Shunt-LDO has been verified over several years of development and the radiation hardness of the regulator design in the 65 nm CMOS process node used for the ATLAS ITk pixel readout chips has been proven. The operation and performance of next-generation pixel readout chips using the Shunt-LDO was demonstrated using RD53A, a technology demonstrator for the future ATLAS and CMS pixel readout chips.
An additional focus of this work is the large scale prototyping of serial powering. In the context of this work the Outer Barrel Demonstrator (OBD) program at CERN was commissioned and yielded first valuable experiences in operating a serially powered pixel detector with representative services and local supports. The OBD was the first prototype to operate multiple parallel, electrically coupled serial powering chains successfully. Finally a serial powering chain with pixel detector modules based on the next-generation readout chip, the RD53A, has been scoped, designed and set up in the context of this thesis with the goal to study low-level properties of serially powered detectors. This prototype, consisting of 8 RD53A quad chip modules with planar silicon sensors, demonstrated the ability to operate a serial powering chain with modules based on the next-generation readout chips without any performance deterioration
Development and Evaluation of Prototypes for the ATLAS ITk Pixel Detector
The ATLAS tracking system will be replaced by an all-silicon detector for the HL-LHC upgrade around 2025. The innermost five layers of the detector system will be pixel detector layers which will be most challenging in terms of radiation hardness, data rate and readout speed. A serial power scheme will be used for the pixel layers to reduce the radiation length and power consumption in cables. New elements are required to operate and monitor a serially powered detector including a detector control system, constant current sources and front-end electronics with shunt regulators. Prototypes for all subsystems are built to verify the concept and operate multiple serial power chains as a system test. The evaluation of both the readout of multi-modules and mechanical integration are further aims of the prototyping campaign. In the contribution, results will be presented of this prototyping effort. Moreover, details and features of serial powering for full detector systems will be given
Prototyping Serial Powering with RD53A and ITkPixV1.1
The high luminosity upgrade for the Large Hadron Collider at CERN requires a complete overhaul of the current inner detectors of ATLAS and CMS. These new detectors will consist of all-silicon tracking detectors. A serial powering scheme has been chosen in order to cope with the various constraints of the new detectors. In order to verify this new powering scheme and provide input for various system aspects, efforts are ongoing to set up a first larger prototype for serial powering using modules based on the new readout chips developed in 65 nm CMOS technology by the RD53 collaboration, RD53A and ITkPixV1. In particular, a serial powering stave consisting of up to 8 quad modules, either RD53A with planar sensor or ITkPixV1.1 without a sensor, has been set up in Bonn. This contribution covers the results obtained with RD53A modules and presents first measurements with a full ITkPixV1.1 serial powering chain, with emphasis on the electrical characterization of modules in a serial chain with representative services and power supplies
Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades
Serial powering is the baseline option for the pixel detectors in both the ATLAS and the CMS experiments targeting the phase II HL-LHC upgrade. The Shunt-LDO regulator is integrated in the front-end chips to generate the required supply voltages. A new compensation scheme has been developed to assure stable operation with large on-chip low-ESR (equivalent series resistance) load capacitances. A two-stage bandgap voltage reference circuit has been implemented to improve regulation performance. Security features have been added to protect against overvoltage and overload. Additional features have been added to allow regulator operation with small supply currents during the installation phase
Serial powering optimization for CMS and ATLAS pixel detectors within RD53 collaboration for HL-LHC: system level simulations and testing
Serial powering is the baseline choice for low mass power distribution for the CMS and ATLAS HL-LHC pixel detectors. Two 2.0 A Shunt-LDO regulators are integrated in a prototype pixel chip implemented in 65-nm CMOS technology and used to provide constant supply voltages to its power domains from a constant input current. Performance results from testing prototype Shunt-LDO regulators are shown, including their behaviour after x-ray irradiation. The system level simulation studies, which had been performed with a detailed regulator design in a serially powered topology, have been validated
BDAQ53, a versatile pixel detector readout and test system for the ATLAS and CMS HL-LHC upgrades
BDAQ53 is a readout system and verification framework for hybrid pixel detector readout chips of the RD53 family. These chips are designed for the upgrade of the inner tracking detectors of the ATLAS and CMS experiments. BDAQ53 is used in applications where versatility and rapid customization are required, such as in laboratory testing environments, test beam campaigns, and permanent setups for quality control measurements. It consists of custom and commercial hardware, a Python-based software framework, and FPGA firmware. BDAQ53 is developed as open source software with both software and firmware being hosted in a public repository
Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades
Serial powering is the baseline option for the pixel detectors in both the ATLAS and the CMS experiments targeting the phase II HL-LHC upgrade. The Shunt-LDO regulator is integrated in the front-end chips to generate the required supply voltages. A new compensation scheme has been developed to assure stable operation with large on-chip low-ESR (equivalent series resistance) load capacitances. A two-stage bandgap voltage reference circuit has been implemented to improve regulation performance. Security features have been added to protect against overvoltage and overload. Additional features have been added to allow regulator operation with small supply currents during the installation phase
Author Correction: A detailed map of Higgs boson interactions by the ATLAS experiment ten years after the discovery
Measurement of the four-lepton invariant mass spectrum in 13 TeV proton-proton collisions with the ATLAS detector
A measurement of the four-lepton invariant mass spectrum is made with the ATLAS detector, using an integrated luminosity of 36.1 fb −1 of proton-proton collisions at s = 13 TeV delivered by the Large Hadron Collider. The differential cross-section is measured for events containing two same-flavour opposite-sign lepton pairs. It exhibits a rich structure, with different mass regions dominated in the Standard Model by single Z boson production, Higgs boson production, and Z boson pair production, and non-negligible interference effects at high invariant masses. The measurement is compared with state-of-the-art Standard Model calculations, which are found to be consistent with the data. These calculations are used to interpret the data in terms of gg → ZZ → 4ℓ and Z → 4ℓ subprocesses, and to place constraints on a possible contribution from physics beyond the Standard Model.[Figure not available: see fulltext.]. © 2019, The Author(s)
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