160 research outputs found
600 Mrad TID effects on a new generation high rate Pixel Readout ASIC in 65nm CMOS with low-power, low noise synchronous analog front-end using Fast ToT encoding and auto-zeroing
No full textNo-Regret Slice Reservation Algorithms
No full textEmerging network slicing markets promise to boost the utilization of expensive network resources and to unleash the potential of over-the-top services. Their success, however, is conditioned on the service providers (SPs) being able to bid effectively for the virtualized resources. In this paper we consider a hybrid advance-reservation and spot slice market and study how the SPs should reserve slices in order to maximize their performance while not exceeding their budget. We consider this problem in its general form, where the SP demand and slice prices are time-varying and revealed only after the reservations are decided. We develop a learning-based framework, using the theory of online convex optimization, that allows the SP to employ a no-regret reservation policy, i.e., achieve the same performance with a hypothetical policy that has knowledge of future demand and prices. We extend our framework for the scenario the SP decides dynamically its slice orchestration, where it additionally needs to learn which resource composition is performance - maximizing; and we propose a mixed-time scale scheme that allows the SP to leverage any spot-market information revealed between its reservations. We evaluate our learning framework and its extensions using a variety of simulation scenarios and following a detailed parameter sensitivity analysis.Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Embedded System
Learning-based Reservation of Virtualized Network Resources
No full textNetwork slicing markets have the potential to increase significantly the utilization of virtualized network resources and facilitate the low-cost deployment of over-the-top services. However, their success is conditioned on the service providers (SPs) being able to bid effectively for the virtualized resources. In this paper, we consider a hybrid advance-reservation and spot slice market and study how the SPs should reserve resources to maximize their services' performance while not violating a time-average budget threshold. We consider this problem in its general form where the SP demand and slice prices are time-varying and revealed only after the reservations are decided. We develop a learning-based framework, using the theory of online convex optimization, that allows the SP to employ a no-regret reservation policy, i.e., achieve the same performance with an oracle that has full access to all future demand and prices. We extend the framework to the scenario where the SP decides dynamically its slice orchestration and hence needs to learn the performance-maximizing resource composition; and we further develop a mixed-time scale scheme that allows the SP to leverage spot-market information that is revealed between successive reservations. The proposed learning framework is evaluated using representative simulation scenarios that highlight its efficacy as well as the impact of key system and algorithm parameters.Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Embedded System
Pixel front-end with synchronous discriminator and fast charge measurement for the upgrades of HL-LHC experiments
No full textThe upgrade of the silicon pixel sensors for the HL-LHC experiments requires the development of new readout integrated circuits due to unprecedented radiation levels, very high hit rates and increased pixel granularity. The design of a very compact, low power, low threshold analog very front-end in CMOS 65 nm technology is described. It contains a synchronous comparator which uses an offset compensation technique based on storing the offset in output. The latch can be turned into a local oscillator using an asynchronous logic feedback loop to implement a fast time-over-threshold counting. This design has been submitted and the measurement results are presented
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River rocks and vanishing oranges
No full textRiver Rocks and Vanishing Oranges is a novel set in Southern California, an area that in the first half of the 1900\u27s was the center of the citrus industry for the U.S. The growing, picking and packing of oranges was the primary industry in what today is the Inland Empire. The orange industry flourished in Highland and Redlands until the mid-1960\u27s when the area began its transformation from rural agricultural community to an urban society. The author liked the idea of writing a contemporary story that had this history as its background. She wasn\u27t interested in writing a historical fiction about the citrus industry, but rather about the people who live in the modern end result of that time period. She wanted to show the evolution of the area and of people who lived in these towns filled with acres of orange groves
A low-power low-noise synchronous pixel front-end chain in 65 nm CMOS technology with local fast ToT encoding and autozeroing for extreme rate and radiation at HL-LHC
No full textA low-power and low-noise synchronous front-end chain in a commercial 65 nm CMOS technology suitable for the future pixel upgrades at the CERN Large Hadron Collider (LHC) is presented. A shaper-less Charge-Sensitive Amplifier (CSA) with constant current feedback provides triangular pulse shaping for linear Time-over-Threshold (ToT) charge measurement. The sensor leakage current is compensated by the same feedback network. A track-and-latch voltage comparator is adopted for the hit discrimination. The hit generation is synchronized with a 40 MHz clock, minimizing time-walk issues in the time-stamp assignment. Fast ToT charge encoding up to 8-bit resolution can be retrieved at the pixel level exploiting a high-frequency self-generated clock signal. This is obtained by turning the latch into a voltage-controlled oscillator (VCO) using asynchronous logic. Pixel-to-pixel threshold variations are compensated by means of an autozeroed scheme, thus avoiding the need of a on-pixel D/A converter. An array of 8 × 8 cells with 50 μm × 50 μm pixel size has been prototyped. Design specifications, implementation and test results are discussed
Population-genomic insights into emergence, crop-adaptation, and dissemination of Pseudomonas syringae pathogens
No full textThis is the author accepted manuscript. The final version is available from the publisher via the DOI in this record.Many bacterial pathogens are well characterized but, in some cases, relatively little is
known about the populations from which they emerged. This limits understanding of
the molecular mechanisms underlying disease. The crop pathogen Pseudomonas
syringae sensu lato has been widely isolated from the environment, including wild
plants and components of the water cycle, and causes disease in several economically
important crops. Here, we compared genome sequences of 45 P. syringae crop
pathogen outbreak strains with 69 closely related environmental isolates. Phylogenetic
reconstruction revealed that crop pathogens emerged many times independently from
environmental populations. Unexpectedly, differences in gene content between
environmental populations and outbreak strains were minimal with most virulence
genes present in both. However, a genome-wide association study identified a small
number of genes, including the type III effector genes hopQ1 and hopD1, to be
associated with crop pathogens, but not with environmental populations, suggesting
that this small group of genes may play an important role in crop disease emergence.
Intriguingly, genome-wide analysis of homologous recombination revealed that the
locus Psyr 0346, predicted to encode a protein that confers antibiotic resistance, has
been frequently exchanged among lineages and thus may contribute to pathogen
fitness. Finally, we found that isolates from diseased crops and from components of the
water cycle, collected during the same crop disease epidemic, form a single
population. This provides the strongest evidence yet that precipitation and irrigation
water are an overlooked inoculum source for disease epidemics caused by P.
syringae.Caroline L. Monteil
received support from INRA and the European Union, in the framework of the Marie-Curie FP7
COFUND People Programme, through the award of an AgreenSkills’ fellowship (under grant
agreement n° 267196). Research in Boris A. Vinatzer’s laboratory and genome sequencing was
funded by the National Science Foundation of the USA (grants IOS-1354215 and DEB-1241068).
Funding for work in the Vinatzer laboratory was also provided in part by the Virginia Agricultural
Experiment Station and the Hatch Program of the National Institute of Food and Agriculture, U.S.
Department of Agriculture. Work carried out in the Sheppard laboratory was supported by the
Medical Research Council (MRC) grant MR/L015080/1, and the Wellcome Trust grant
088786/C/09/Z. GM was supported by a NISCHR Health Research Fellowship (HF-14-13)
Immigration Legal Services as a Structural HIV Intervention for Latinx Sexual and Gender Minorities
No full textAccelerated series for universal constants, by the W Zmethod
No full textIn this paper, the author presents a method, based on WZ theory, for finding rapidly converging series for universal constants. This method is analogous but different from Amdeberhan and Zeilberger's method
Results from CHIPIX-FE0, a Small Scale Prototype of a New Generation Pixel Readout ASIC in 65nm CMOS for HL-LHC
No full textCHIPIX65-FE0 is a readout ASIC in CMOS 65nm designed by the CHIPIX65 project for a pixel detector at the HL-LHC, consisting of a matrix of 64x64 pixels of dimension 50x50 μm2. It is fully functional, can work at low thresholds down to 250e− and satisfies all the specifications. Results confirm low-noise, fast performance of both the synchronous and asynchronous front-end in a complex digital chip. CHIPIX65-FE0 has been irradiated up to 600 Mrad and is only marginally affected on analog performance. Further irradiation to 1 Grad will be performed. Bump bonding to silicon sensors is now on going and detailed measurements will be presented. The HL-LHC accelerator will constitute a new frontier for particle physics after year 2024. One major experimental challenge resides in the inner tracking detectors, measuring particle position: here the dimension of the sensitive area (pixel) has to be scaled down with respect to LHC detectors. This paper describes the results obtained by CHIPIX65-FE0, a readout ASIC in CMOS 65nm designed by the CHIPIX65 project as small-scale demonstrator for a pixel detector at the HL-LHC. It consists of a matrix of 64x64 pixels of dimension 50x50 um2 pixels and contains several pieces that are included in RD53A, a large scale ASIC designed by the RD53 Collaboration: two out of three front-ends (a synchronous and an asynchronous architecture); several building blocks; a (4x4) pixel region digital architecture with central local buffer storage, complying with a 3 GHz/cm2 hit rate and a 1 MHz trigger rate maintaining a very high efficiency (above 99%). The chip is 100% functional, either running in triggered or trigger-less mode. All building-blocks (DAC, ADC, Band Gap, SER, sLVS-TX/RX) and very front ends are working as expected. Analog performance shows a remarkably low ENC of 90e-, a fast-rise time below 25ns and low-power consumption (about 4μA/pixel) in both synchronous and asynchronous front-ends; a very linear behavior of CSA and discriminator. No significant cross talk from digital electronics has been measured, achieving a low threshold of 250e-. Signal digitization is obtained with a 5b-Time over Threshold technique and is shown to be fairly linear, working well either at 80 MHz or with higher frequencies of 300 MHz obtained with a tunable local oscillator. Irradiation results up to 600 Mrad at low temperature (-20°C) show that the chip is still fully functional and analog performance is only marginally degraded. Further irradiation will be performed up to 1 Grad either at low or room temperature, to further understand the level of radiation hardness of CHIPIX65-FE0. We are now in the process of bump bonding CHIPIX65-FE0 to 3D and possibly planar silicon sensors during spring. Detailed results will be presented in the conference paper
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