International Journal of Reconfigurable and Embedded Systems (IJRES)
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Design and Development of ARM based Electronic Test Evaluation System for RTO
Get PDFElectronic test evaluation system for driving license is very useful now a days, as there is increase in the human intervention in the system. This system make the driving license procedure transparent to human being. The proposed technological solution is advancement towards the automation of system and improves the driving test accuracy. As a contribution to society this system reduces the number of road accidents occurs due to untrained drivers
Web Based Home Security and Automation System
Get PDFHome security and automation is crucial issue concerned by people. A home security system is needed for convenience and safety. A home automation system is a key to having effective energy efficiency in the house. In this paper, we present the design and implementation of a web-based home security and automation system. This system make use of PIR motion sensor to detect intruder in the house. This sensor is further fed to microcontroller which would help the GSM module to send notification to house owner regarding the intrusion. On the other hand, the LDR light sensor is used to provide auto-light functionality which will turn on the light at night and dim it at day time. A web-based system function as a remote control system for user to monitor control the sensors and lights at home in order to save energy consumption. This system is accessible by user anytime and anywhere as long there is an Internet connection
GSM Based Generator Monitoring System for Steel Melting Shop
Get PDFSteel making processes are highly energy intensive and comprised of many complex unit operations. Iron ore and coal need preprocessing before feeding into a reactor, and molten metal from different reactors needs to be carefully drawn into a solid metal and then rolled into sheets. Each of these operations has a stake in the quality of steel produced, and needs constant monitoring and need continuous power supply for fabrication. If a power failure occurs the production will be stopped, time delay increases for finishing fabrication. In some cases we can loss consumer due to unsatisfactory. My Project focuses the detection of power failure and takes reflex action to solve the problem with help of modem communication using GSM. The power failure will be intimated to the Microcontroller it drive the GSM modem to send a text message to the concern person mobile number which was already programmed in Microcontroller and also monitoring the parameter are temperature, oil level, fuel level and when they exceed predefined limits an automatically intimated to authorized person and also This system can be designed to send SMS alerts whenever the Circuit Breaker (Relay) trips and simulation result done by using LabVIEW software
Hardware Implementation of 3-level Inverter using Microcontroller for Single Phase Induction Motor
Get PDFThe conventional two level inverter has many limitations for high voltage & high power applications. The term multilevel began with the three-level inverter. Subsequently, several multilevel inverter topologies have been developed. However, the elementary concept of a multilevel inverter to achieve higher power is to use a series of power semiconductor switches with several lower voltage dc sources to perform the power conversion by synthesizing a staircase voltage waveform. Output voltage of 3 level inverter consists of 3 levels, which results smoother output. And hence the THD will be reduced. In this paper Simulink of 3 level inverter and the hardware implementation of micro controller based control of multilevel inverter for single phase Induction motor are presented
An FPGA Implementation of On Chip UART Testing with BIST Techniques
Get PDFA Universal Asynchronous Receiver Transmitter (UART) is usually implemented for asynchronous serial communication, mostly used for short distance communications. It allows full duplex serial communication link and is used in data communication and control system. Nowadays there is a requirement for on chip testing to overcome the product failures. This paper targets the introduction of Built-in self test (BIST) for UART to overcome the above two constraints of testability and data integrity. The 8-bit UART with BIST module is coded in Verilog HDL and synthesized and simulated using Xilinx XST and implemented on SPARTAN 3E FPGA. Results indicate that this model eliminates the need for expensive testers and thereby it can reduce the development time and cost
HW SW Co-design of Adaptive Task Scheduler for Real Time Systems
Get PDFIn embedded system, a real-time operating system (RTOs) is often used to structure the application code and ensure that the deadlines are met by reacting on events in the environment by executing the functions within precise time. Most embedded systems are bound to real-time constraints with determinism and latency as a critical metrics. Generally RTOs are implemented in software, which in turns increases computational overheads, jitter and memory footprint which can be reduced even if not remove completely by utilizing latest FPGA technology, which enables the implementation of a full featured and flexible hardware based RTOs. Scheduling algorithms play an important role in the design of real-time systems. This paper proposes the novel FIS based adaptive hardware task scheduler for multiprocessor systems that minimizes the processor time for scheduling activity which uses fuzzy logic to model the uncertainty at first stage along with adaptive framework that uses feedback which allows processors share of task running on multiprocessor to be controlled dynamically at runtime. This Fuzzy logic based adaptive hardware scheduler breakthroughs the limit of the number of total task and thus improves efficiency of the entire real-time system. The increased computation overheads resulted from proposed model can be compensated by exploiting the parallelism of the hardware as being migrated to FPG
Design and Analysis of CMOS and Adiabatic 1:16 Multiplexer and 16:1 Demultiplexer
Get PDFConventional CMOS is compared with two adiabatic logic styles namely Efficient Charge Recovery Logic (ECRL) and Improved Efficient Charge Recovery Logic (IECCRL). A 16:1 multiplexer and 1:16 demultiplexer using these design techniques are designed and results are compared based on their minimum/maximum power consumption and transistor count. The proposed schematics multiplexer and demultiplexer are simulated using Microwind2 and DSCH2 software
FPGA Based Data Hiding Methods using DNA Cryptography Techniques
Get PDFTo convey the information safely DNA grouping mechanisms are used. There are many methods used by DNA sequences. The proposed method is of both encryption and information concealing utilizing a few properties of Deoxyribonucleic Acid (DNA) groupings. This technique is highlighted that DNA groupings have many more intriguing properties which are used for concealing the information. There are three strategies in this encryption strategy: the Insertion Technique, the Complimentary Pair Technique and the Substitution Strategy .For every single strategy, a specific reference DNA grouping P is chosen and then the taken sequence is changed over with the mystery message M and is consolidated, so that P0 is acquired. P0 is then sent to the collector and the beneficiary can recognize and separate the message M covered up in P. This technique is proposed to utilize INSERTION Strategy. Subsequently, the proposed plan comprises for the most part of two stages. In the principal stage, the mystery information is encoded utilizing a DNA Sequence. In the second stage the encoded information is steganographically covered up into some reference DNA grouping utilizing an insertion strategy. The effectiveness of this security algorithm is seen with many merits and limitations. A, C, G, and T are the 4 nucleotides which are taken for this project
Design and Implementation of Multichannel Data Acquisition and Processing System Using LabVIEW
Get PDFThe data acquisition and processing architecture covers the most demanding applications of continuousmonitoring in industrial field. The multichannel data acquisition is essential for acquiring and monitoring the various signals from industrial sensors. The problem is that the data storage and hardware size, so the multichannel data obtained is processed at runtime and stored in an external storage for future reference. The method of implementing the proposed design is by using the ARM Cortex M-3 Processor to reduce the hardware size. The Cortex M-3 attains high resolution. A Eight channel data acquisition processing (DAQP) and Controlling was designed, developed using the Lab VIEW graphical programming. The module was designed in order to provide high accuracy, storage and portability. The system designed is not specific for any sensor acquisition, so any sensor having signal conditioning circuit built can be connected to the DAQ (Data Acquisition System). ARM controller is used as heart of the DAQ
The Experimental Platform Design for NCS Based on CAN Bus
Get PDFIn order to facilitate research on the performance of Networked Control System, overcome the defects of unable to reflect the system performance, based on the CAN bus a kind of NCS experimental platform is designed. The system is composed of a main node and several slave nodes and Dc motor as the actuator. The master node is designed with ARM + U-boot + Linux structure, connecting with PC via Ethernet. For this experiment platform, using c + + Builder a scheduling algorithm performance testing software is developed, to further research on the effects of different scheduling algorithm on the NCS performance