International Journal of Reconfigurable and Embedded Systems (IJRES)
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BIST Architecture using Area Efficient Low Current LFSR for Embedded Memory Testing Applications Applications
Get PDFOne of the important block of BIST controller is LFSR and the speed with which BIST operates depends on LFSR systems design. There are methods in implementing LFSR using field programmable gate arrays (FPGAs) or digital signal processors (DSPs). BIST controller system speed is then limited to FPGAs and DSPs, which may influence other parameters such as overall area, maximum current, limit and power dissipation. This paper proposes a technique to achieve an efficient BIST controller by redesigning LFSR using GDI based D flip-flops that resulted with low area and low current capabilities. This paper presents three different techniques for implementing flip-flops for an efficient LFSR so that the layout area will be minimized as well as the maximum current drawn will be lower
Using FPGA Design and HIL Algorithm Simulation to Control Visual Servoing
Get PDFThis is a novel research paper provides an optimal solution for object tracking using visual servoing control system with programmable gate array technology to realize the visual controller. The controller takes in account the robot dynamics to generate the joint torques directly for performing the tasks related to object tracking using visual servoing. Also, the notion of dynamic perceptibility provides the capability of the designed system to track desired objects employing direct visual servoing technique. This idea is assimilated in the suggested controller and realized in the programmable gate array. Additionally, this paper grants an ideal control framework for direct visual servoing robots that incorporates dynamic perceptibility features. With the aim of evaluating the proposed FPGA based architecture, the control algorithm is applied to Hardware-in-the-loop simulation (HIL) set up of three degrees of freedom rigid robotic manipulator with three links. Furthermore, different investigations are performed to demonstrate the behavior of the proposed system when a trajectory adjacent to a singularity is attained
On-chip AMBA Bus Based Efficient Bridge between High Performance and Low Peripheral Devices
Get PDFToday’s scenario of SOC deals with integrity and sharing of information or data with various level of communication. AMBA bus protocol has been proposed by ARM community to justify the uneven demand of integrity .In this paper functional description and implementation of high peripheral devices supporting protocol AXI2.0 and its interface between low peripheral devices has been proposed. The connection named as bridge take care of the protocol mismatch and operates on data transfer for uneven speed demand. Asynchronous FIFO has been considered to avoid the complex handshaking mechanism. The design has been implemented within VHDL and implemented on Xilinx Virtex 4
FPGA-based Architecture of Direct Torque Control
Get PDFThis paper presents an optimized FPGA architecture of a DTC “direct torque control” drive of an induction motor. The proposed architecture is based on variable fixed point world size and the use ipcores in order to achieve higher sampling frequency which leads to reduce the electromagnetic torque and flux ripples. The hardware implementation was experimentally validated, the results shows the effectiveness of the hardware DTC drive implementation by the minimization of the torque and flux rippl
Software and Hardware for managing Scratch Pad Memory
Get PDFThis paper proposes a low-cost architecture to improve the management SPM (Scratch Pad Memory) in dynamic and multitasking modes. In this context, our management strategy SPM based on Programmable Automaton implemented in Xilinx Vertex-5 FPGA is entirely different from prior research works. SPM is generally managed by software (by a strong programming logic or by compilation). But our Programmable Automaton facilitates access to SPM in order to move code or data and liberates space in SPM. After this step, software takes over content management of SPM (what part of code or data should be placed in SPM, locates spaces of Heap and Stack). So the performance of the programs is actually improved thanks to minimization of the access latency at the DRAM (Dynamic Random Access Memory or Main Memory)
CMOS Active Inductor Based Voltage Controlled Oscillator
Get PDFA Tunable Active Inductor (TAI) based Voltage Controlled Oscillator (VCO) for Radio Frequency (RF) applications ranging from 670 MHz - 1.53 GHz is presented. A design of low phase noise and compact VCO is proposed. In order to lower the phase noise of VCO, its RF output power has been improved. The use of low voltage active in-ductor circuit reduces the power dissipation of VCO. The single ended CMOS active inductors with minimum number of transistors are used to consume less die area of VCO circuit. The low power dissipation of the circuit have high efficiency to generate output RF power. A supply independent variable current source tunes the VCO. The post layout design is simulated in Cadence spectreRF using TSMC 180 nm process libraries. The VCO circuit shows the phase noise variation from -124 to - 126 dBc/Hz and an active area of 0.0049 mm2. The VCO core circuit, excluding output buffers, consumes 10 mW at 1.8 V supply voltage
Android Based Switch Controlling Technique for LED Bulbs Using Bluetooth/Wi-Fi Technology
Get PDFThis paper presents an efficient approach to switch on/off and control the intensity of an LED bulb from a remote place using Android Applications installed in a Smartphone. As LED household bulbs and lights are energy efficient, drop-in replacements for the incandescent lighting found in homes and offices. These lights produce a warm brightness while providing a significant cost savings over traditional lighting. Bluetooth & Wi-Fi modules are used simultaneously as an interface that make connection between Android Application and the LPC2148 controller by which the generated output can be viewed with the help of an LED bulb and control various other devices, based on the availability in particular areas
Smart Assisted Vehicle for Disabled/Elderly using Raspberry Pi
Get PDFIndependent mobility is a key component in maintaining the physical and psychosocial health of an individual. Further, for people e having disabled/elderly, independent mobility increases vocational and educational opportunities, reduces dependence on caregivers and family members, and promotes feelings of self-reliance. Psychologically, a decrease in mobility can lead to feelings of emotional loss, anxiety, depression, educed self-esteem, social isolation, stress, and fear of abandonment. Even though the benefits of powered mobility are well documented, the safety issues associated with operation of powered vehicles often prevent clinicians and rehabilitation practitioners from prescribing powered mobility. So we are introducing an intelligent vehicle for disables/elderly people which uses an array of sensors to help with the movement of the vehicle with minimal human interaction. Functionalities of the proposed system are further enhanced using android interface connect to the vehicle via Bluetooth
Design And Analysis Of CMOS Low Noise Amplifier Circuit For 5-GHz Cascode and Folded Cascode In 180nm Technology
Get PDFThis paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF
Simulation and Real Time Implementation of Various PWM Strategies for 3 Φ Multilevel Inverter Using FPGA
Get PDFFor high power applications Multilevel Inverter (MLI) is extensively used. The major advantages of MLI are good power quality, low switching losses and maintenance of the desired voltage. In this work, the three phase cascaded multi level inverter is analyzed under various modulation techniques that include Sub-Harmonic Pulse Width Modulation (SHPWM) i.e. Phase Disposition (PD) strategy, Phase Opposition Disposition (POD) strategy, Alternate Phase Opposition Disposition (APOD) strategy, hybrid strategy (PD and PS) and Phase Shift (PS) strategy. The study will help to choose those techniques with reduced harmonics for the chosen three phase cascaded MLI with R-L load. The Total Harmonic Distortion (THD), VRMS (fundamental), crest factor and form factor are evaluated for various modulation indices at two different switching frequencies (3.15KHz and 6 KHz). Simulation is performed using MATLAB-SIMULINK. It is observed that HYBRID PWM and PSPWM methods provide output with relatively low distortion for low and high switching frequencies. PODPWM and PSPWM are found to perform better since they provide relatively higher fundamental RMS output voltage for 6 KHz and 3.15 KHz switching frequencies. The experimental result shows PSPWM provide output with low distortion and HYBRID PWM provide output with higher fundamental RMS voltage for fc=3.15KHz. The experimental results were obtained only for fc=3.15KHz