2,204 research outputs found
Inauguració del curs 2013-2014 del Programa de majors de 50 anys
No full textActe d'inauguració del curs 2013-2014 del Programa de Formació Universitària per a Majors de 50 anys. L’acte va començar amb la participació de Josep Torrellas, coordinador del programa, que va informar de les novetats d’aquest curs i, a continuació, va prendre la paraula Anna M. Geli, rectora de la Universitat de Girona, que va pronunciar la conferència 'Impacte de la UdG a l’entorn', en què va fer un resum de tots els estaments implicats, directament o indirectament, amb la Universitat de Girona, des dels membres de la comunitat universitària a les empreses gironines, catalanes i estrangeres que hi col·laboren3274.mp
Taula rodona 2
No full textSegona taula rodona de la Jornada Envelliment Actiu moderada per la Sra. Pietat Casadevall, química, docent i alumna del Programa de Formació Universitària per a la Gent Gran de la UdG. Hi participen: Sra. Sandra Pascual de l' equip municipal de Promoció de la Salut de l' Ajuntament de Girona, Sra. Josefina Altés, coordinadora del Programa Bancs del Temps de l' estat espanyol, Sr. Josep Maria Bosch, vicepresident 2n del Consell de la Gent Gran de Catalunya i Sr. Josep Torrellas, responsable de Formació de la Gent Gran de la UdG2974.mp4
2974.mp
Normativity, moral realism, and unmasking explanations
No full textMoral Projectivism must be able to specify under what conditions a certain inner response counts as a moral response. I argue, however, that moral projectivists cannot coherently do so because they must assume that there are moral properties in the world in order to fix the content of our moral judgements. To show this, I develop a number of arguments against moral dispositionalism, which is, nowadays, the most promising version of moral projectivism. In this context, I call into question both David Lewis' dispositionalist account of colour and Chistine Korsgaard's procedural realism
Presa de possessió dels vocals de la Comissió Gestora 1992
No full textNomenament i presa de possessió dels vocals de la Comissió Gestora: Josep Torrellas, Emili Montesinos, Modest Prats, Miquel Sánchez, Joan Miró i Anna M. Geli1213.mp4
1213.mp
Cloenda del Programa Majors de 50 Anys - Conferència "Tres generacions: la nostra, la següent i la que comença" a càrrec de jordi Pujol
No full textActe de cloenda dels curs 2012-2013 del Programa de Formació per a Majors de 50 anys. L'acte va estar presidit per la Dra. Anna M. Geli, Rectora Magnífica de la Universitat de Girona, i va comptar amb la presència del Sr. Josep Torrellas, responsable del programa de Formació de la Gent Gran. Després del lliurament d'acreditacions i certificats als assistents als cursos, el Molt Honorable Sr. Jordi Pujol, expresident de la Generalitat de Catalunya, va pronunciar la conferència "Tres generacions: la nostra, la següent i la que comença"3104.mp4
3104.mp
Inauguració de la Jornada "Envelliment Actiu"
No full textActe d' inauguració de la Jornada Envelliment Actiu que va tenir lloc el 8 de març de 2013 a Girona, a càrrec del Sr. Joaquim M. Puigvert, vicerrector de Relacions Institucionals, Societat i Cultura, Sr. Carles Puigdemont, alcalde de Girona, Sr. Josep Torrellas, responsable de Formació de la Gent Gran de la Universitat de Girona i la Sra. Dolors Juvinyà, directora de la Càtedra de Promoció de la Salut de la UdG2972.mp4
2972.mp
Exploiting multiprocessor memory hierarchies for operating systems
No full textWith the increasing gap between processor speed and memory speed, a sophisticated memory hierarchy is key to high performance. However, the operating system tends to use the memory hierarchy poorly. This thesis presents a comprehensive characterization and optimization of the performance of multiprocessor memory hierarchies for operating systems. The operating system instruction cache misses are reduced by 81% using a code reorganization scheme tailored to the operating system, guarded sequential prefetching, and stream buffers. The operating system data cache misses are reduced by 53% using a DMA-like pipelined block transfer engine, a selective update protocol, data relocation and privatization, and data prefetching in miss hot spots. The overall OS time is reduced by 32%. The cost-performance trade-offs of the software/hardware optimization schemes are also discussed.Made available in DSpace on 2011-05-07T14:27:34Z (GMT). No. of bitstreams: 2
license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5)
9702719.pdf: 7263634 bytes, checksum: d2ff20e11da17cc1d8393dfe8c2d45de (MD5)
Previous issue date: 1996Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding ([email protected]) on 2011-05-07T15:06:56Z
Item is restricted indefinitely.Restriction data tranferred 2014-07-01T11:32:10-05:00
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Opportunistic power reassignment between processor and memory in 3D stacks
No full textThe pin count largely determines the cost of a chip package, which is often comparable to the cost of a die. In 3D processor-memory designs, power and ground (P/G) pins can account for the majority of the pins. This is because packages include separate pins for the disjoint processor and memory power delivery networks (PDNs). Supporting separate PDNs and P/G pins for processor and memory is inefficient, as each set has to be provisioned for the worst-case power delivery requirements.
In this thesis, we propose to reduce the number of P/G pins of both processor and memory in a 3D design, and dynamically and opportunistically divert some power between the two PDNs on demand. To perform the power transfer, we use a small bidirectional on-chip voltage regulator that connects the two PDNs. Our concept, called Snatch, is effective. It allows the computer to execute code sections with high processor or memory power requirements without having to throttle performance. We evaluate Snatch with simulations of an 8-core multicore stacked with two memory dies. In a set of compute-intensive codes, the processor snatches memory power for 30% of the time on average, speeding-up the codes by up to 23% over advanced turbo-boosting; in memory-intensive codes, the memory snatches processor power. Alternatively, Snatch can reduce the package cost by about 30%.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2018-12-01The student, Dimitrios Skarlatos, accepted the attached license on 2016-12-02 at 14:04.The student, Dimitrios Skarlatos, submitted this Thesis for approval on 2016-12-02 at 14:56.This Thesis was approved for publication on 2016-12-05 at 13:20.DSpace SAF Submission Ingestion Package generated from Vireo submission #10420 on 2017-02-28 at 14:43:11Made available in DSpace on 2017-03-01T17:02:02Z (GMT). No. of bitstreams: 2
SKARLATOS-THESIS-2016.pdf: 640656 bytes, checksum: 2d600e4f7b03dba0d6cc8243bcaf6638 (MD5)
LICENSE.txt: 4216 bytes, checksum: d7b7d07a9b18a00ccdf8c1e595c25a78 (MD5)
Previous issue date: 2016-12-05Embargo set by: Seth Robbins for item 98725
Lift date: 2019-03-01T17:02:22Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98725
Lift date: 2019-03-01T17:03:32Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98725
Lift date: 2019-03-01T17:05:02Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98725
Lift date: 2019-03-01T17:06:55Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemLimited Restriction Lifted for Item 98725 on 2019-03-02T10:15:07Z
Record and replay based virtual-machine introspection for system security
No full textHardware security features need to strike a careful balance between design intrusiveness and completeness of methods. Securing against attacks like Return Oriented Programming (ROP) requires frequent and expensive checks. Complete security defenses have been proposed yet modern systems are still vulnerable to ROP attacks. We provide complete security by decomposing the solution into two stages. The first stage raises alarms based on an imprecise, low cost hardware detector. The second stage applies complete methods in order to accurately distinguish real attacks from false alarms. This decomposition is enabled with Record and Deterministic Replay. The original execution is recorded and subjected to replay analysis as alarms are raised. In this way the Replay infrastructure can compensate for the occasional hardware imprecision.
We demonstrate this approach by applying it to thwart ROP attacks on the Linux kernel. We call the design RnR-ROPSafe. It reuses a simple Return Address Stack (RAS) as the hardware detector. The RAS is slightly modified to prevent corruption of the RAS due to multithreading and due to non-procedural returns—improving its performance as a ROP detector. Rare false positives due to underflows are eliminated via replay instead of hardware over-design. RnR-ROPSafe relies on two on-the-fly replayers: an always-on, fast Checkpointing replayer that periodically creates checkpoints, and a detailed-analysis Alarm replayer that is triggered when there is a threat alarm. We find that the first one has execution speed comparable to that of the recorder, and can be replaying all the time, while the latter has to handle only very few false positives.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2018-12-01The student, Yasser Shalabi, accepted the attached license on 2016-12-01 at 11:00.The student, Yasser Shalabi, submitted this Thesis for approval on 2016-12-01 at 11:06.This Thesis was approved for publication on 2016-12-01 at 16:31.DSpace SAF Submission Ingestion Package generated from Vireo submission #10390 on 2017-02-28 at 14:42:42Made available in DSpace on 2017-03-01T17:01:50Z (GMT). No. of bitstreams: 2
SHALABI-THESIS-2016.pdf: 362557 bytes, checksum: ba4eeff5fa52bdb6d5c23729df1b0f49 (MD5)
LICENSE.txt: 4211 bytes, checksum: 01e25a99edccc51952adc113c951e8a5 (MD5)
Previous issue date: 2016-12-01Embargo set by: Seth Robbins for item 98717
Lift date: 2019-03-01T17:02:22Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98717
Lift date: 2019-03-01T17:03:32Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98717
Lift date: 2019-03-01T17:05:02Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 98717
Lift date: 2019-03-01T17:06:55Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemLimited Restriction Lifted for Item 98717 on 2019-03-02T10:15:27Z
Josep Cuatrecasas. A secretis redactor [Cavanillesia 1928–1938]
No full textWe analyze the activity of Josep Cuatrecasas Arumí (1903–1996) as editorial secretary of the magazine Cavanillesia, published between 1928 and 1938. We value his participation from four fronts: secretary, author, reviewer and re-rated. The study allows specifying the date of publication of the articles in the journal, the influence of Emili Huguet del Villar on the geobotanical methodology followed by Josep Cuatrecasas and his effort to disseminate the new botanical publications, from the pages of the journal, together with Pius Font i Quer.Depto. de Farmacia Galénica y Tecnología AlimentariaFac. de FarmaciaTRUEpu
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