177,650 research outputs found
Contribución al estudio del mecanismo de la electromigración en conductores delgados de aluminio
No full textFil: Mahr von Staszewski, Guillermo G. R.. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina
Contribución al estudio del mecanismo de la electromigración en conductores delgados de aluminio
No full textFil: Mahr von Staszewski, Guillermo G. R.. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales; Argentina
Millimeter-wave digitally intensive frequency generation in CMOS / Wanghua Wu, Robert Bogdan Staszewski, John R. Long.
No full textIncludes bibliographical references and index.xi, 188 p.
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A Theory of Skilled Memory
No full textA theory of mnemonic expertise is outlined along
with findings from initial tests. The expertise belongs
to a nonnal adult ( D D ) w h o developed a digit-span of
104 through extended practice. The theory describes
h o w mechanisms consistent with the principles of
skilled m e m o r y (Chase & Ericsson, 1982; Ericsson
& Staszewski, 1989) and identified by analyses of
DD's behavior, support his skill. Implemented as a
computational model, the theory assumes that distinct
knowledge structures mediate both DD's encoding of
short segments of trial lists as elaborate, well-
structured L T M representations and their retrieval in
several recall tasks. Current testing investigates the
model's ability to generate contextual codes, a class of
patterned m e m o r y elaborations experimentally shown
to improve DD's serial recall (Staszewski, 1990).
Given the same lists D D received, it successfully
generates over 8 0 % of the contextual codes in his
verbal reports. Because successful simulation of
contextual codes entails accurate simulation of
operations performed by first-order coding
mechanisms, results support theoretical assumptions
about the knowledge underlying DD's coding
operations. The model's overly powerful coding
suggests that more stringent architectural constraint
must be incorporated to rigorouslydemonstrate h o w
skilled m e m o r y can increase working m e m o r y
capacity in a normal cognitive architecture and
support expertise
Appropriate Similarity Measures for Author Cocitation Analysis
No full textWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
"Closing the R&D Gap, Evaluating the Sources of R&D Spending"
No full textBoth spending and tax policies have been implemented in the United States with the goal of stimulating private sector research and development (R&D). Karier questions whether current R&D policy, especially the research and experimentation tax credit, can contribute to closing the gap between nondefense expenditures on R&D in the United States and such expenditures in other countries, such as Japan and Germany. He also explores possible changes to our current R&D policy to make it more effective.
DTC and TDC IC Design for Ultra-Low-Power ADPLL
No full textThe technology scaling favors the Digital PLLs, which is reconfigurable. In the traditional fractional-N ADPLL, whether counter-based or divider based, DCO and TDC are the main two power consuming blocks. Modifying the phase detection part based on phase prediction makes the architecture more energy-efficient. The new architecture leads to the first wireless ADPLL breaking 1mW barrier. However, the in-band spurs are very high and DTC gain calibration does not work very well. This thesis proposes a pseudo phase domain model to determine the in-band spur level and validates the accuracy through simulations. It also improves the LMS DTC gain calibration algorithm to solve the problem when FCW fractional part is small DTC gain cannot calibrate correctly. Furthermore, pre-distortion is used to cancel DTC nonlinearity. Apart from theoretically analysis, a first-order TDC is taped-out, to measure DTC's nonlinearity.MicroelectronicsMicroelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
Going Beyond Counting First Authors in Author Co-citation Analysis
No full textThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Letter from R. R. Zellick, Assistant Trust Officer, Anglo California National Bank of San Francisco, to Joseph R. Goodman, October 2, 1942
No full textLetter from R. R. Zellick, Assistant Trust Officer at The Anglo California National Bank of San Francisco, to Joseph R. Goodman, regarding property owned by Dave Tatsuno. Zellick mentions a dispute between current tenants and Tatsuno, and that Tatsuno has asked Goodman to help locate trustworthy tenants.Personal correspondence, organizational records, government documents, publications, and other papers created or collected by Joseph R. Goodman documenting the forced removal and incarceration of Japanese Americans during World War II, as well as organized resistance to incarceration. Included in the collection are records of the Japanese Young Men's Christian Association and the Japanese American Citizens' League in San Francisco, including papers of the Japanese YMCA's executive secretary Lincoln Kanai; Sakai family papers; Goodman's correspondence to and from Japanese American incarcerees, organizations opposing forced removal and incarceration of Japanese Americans, the War Relocation Authority, and others; publications, photographs, and ephemera from the Topaz Relocation Center, where Goodman taught high school; War Relocation Authority records and publications; and newspaper clippings, pamphlets, and reports about forced removal and incarceration created by various government, religious, and civic organizations, in California and nationwide
Time-of-Flight 3D Imaging based on a SPAD-TDC Pixel Array in Standard 65 nm CMOS Technology
No full textThe interest in high performance three-dimensional (3D) imaging has grown in recent years due to immense demand in engineering, science, medicine and entertainment domains. The driving goals of state-of-the-art 3D imagers are high sensitivity to light and fine depth resolution at long range. Furthermore, high level of integration is desirable to achieve low system cost. To meet these demands, the industry has started to transition from traditional analog techniques to standard CMOS based solutions. In this thesis, a novel time-of-flight 3D CMOS imager is proposed. The focus of the design is low power consumption while maintaining human-eye safety requirements. The imager targets security applications, primarily facial recognition, but is also suitable for automotive vision and robotics. In this work, a prototype of a 32x32 pixel array is designed, where each pixel consists of a single-photon avalanche diode as photodetector and a time-to-digital converter (TDC) for fast image acquisition. The imager is expected to achieve millimeter-level depth resolution for range as long as 30 m and has a maximum frame-rate of 1000 fps. Each pixel is constructed within 25x25 ?m2 area and has a fill factor of 5.76%. The layout implementation has been carried out in a 65 nm CMOS technology and would be the first of its kind at this process node.Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
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