1,721,003 research outputs found
Harhatoistojen karaktorisointi ja minimointi Delta-Sigma muuntimissa
No full textAbstractOversampling data converters based on Delta-Sigma modulation are a popular solution for modern high-resolution applications. In the design of digital-to-analog or analog-to-digital Delta-sigma converters there are common obstacles due to the difficulties on predicting and verifying their performance. Being a highly nonlinear system, a Delta-Sigma modulator’s (DSM) quantization noise and therefore the spurious tones are difficult to analyze and predict. Multi-bit DACs can be used to improve the performance and linearize the behavior of DSMs. However, this will give rise to the need for linearizing the multi-bit DAC. A popular DAC linearization method, data weighted averaging (DWA) shapes the DAC mismatch noise spectrum. There are many variants of DWA, for low-pass and band-pass DSMs. This thesis proposes a generalization which integrates a few published variants into one, broader DWA scheme. The generalization enables expanding the tone-suppression studies into a larger concept. The performance of one- or multibit DSMs is usually verified by simulations. This thesis proposes a simulation-based qualification (characterization) method that can be used to repeatedly verify and compare the performance of multibit DSM with a DAC mismatch shaping or scrambling scheme. The last contribution of this thesis is a very simple model for tonal behavior. The model enables accurate prediction of spurious tones from both DSMs and DWA-DACs. The model emulates the tone behavior by its true birth-mechanism: frequency modulation. The proposed prediction model for tone-behavior can be used for developing new tone-cancelation methods. Based on the model, a DWA linearization method is also proposed. TiivistelmäDelta-Sigma modulaatio on suosituin tekniikka ylinäytteistävissä datan muuntimissa. Riippumatta toteutustarkoituksesta (analogia-digitaali- tai digitaali-analogia-muunnos), Delta-Sigma (DS) modulaatiossa on yleisesti tunnettuja käyttäytymisen ennustamiseen liittyviä ongelmia. Nämä ongelmat ovat peräisin modulaattorin luontaisesta epälineaarisuudesta: DS-muunnin on nimittäin vahvasti epälineaarinen takaisinkytketty systeemi, jonka harhatoistojen ennustaminen ja analysointi on erittäin hankalaa. Yksibittisestä monibittiseen DS-muuntimeen siirryttäessä muuntimen suorituskyky paranee, ja muuntimen kohinakäyttäytyminen on lineaarisempaa. Tämä kuitenkin kostautuu tarpeena linearisoida DS-muuntimen digitaali-analogia (D/A) muunnin. Tällä hetkellä tunnetuin linearisointimenetelmä on nimeltään DWA (data weighted averaging) algoritmi. Tässä työssä DWA:lle ja sen lukuisille varianteille esitellään eräänlainen yleistys, jonka avulla algoritmia voidaan soveltaa sekä alipäästö- että kaistanpäästö-DS-muuntimelle. Kuten tunnettua, DS-modulaattorin analyyttinen tarkastelu on raskasta. Yksi- ja monibittisten DS-muuntimien suunnitellun käyttäytymisen varmistaminen tapahtuukin yleensä simulointien avulla. Työssä esitetään simulointiperiaate, jolla voidaan kvalifioida (karakterisoida) monibittinen DS-muunnin. Tarkemmin, kvalifioinnin kohteena on DWA:n kaltaiset D/A -muuntimien linearisointimentelmät. Kyseessä on pyrkimys ennen kaikkea toistettavaan menetelmään, jolla eri menetelmiä voidaan verrata nopeasti ja luotettavasti. Tämän väitöstyön viimeinen kontribuutio on matemaattinen malli harhatoistojen syntymekanismille. Mallilla sekä DS-muunnoksen että DWA-D/A -muunnokseen liittyvät harhatoistot voidaan ennustaa tarkasti. Harhatoistot mallinnetaan yksinkertaisella havaintoihin perustuvalla FM-modulaatiokaavalla. Syntymekanismin mallinnus mahdollistaa DS-muuntimien ennustettavuuden ja täten auttaa harhatoiston kumoamismenetelmien kehittämistä. Työssä esitetään yksi matemaattisen mallin avulla kehitetty DWA-D/A -muunnoksen linearisointimenetelmä. Academic dissertation to be presented with the assent of the Faculty of Technology of the University of Oulu for public defence in OP-sali (Auditorium L10), Linnanmaa, on 17 February 2012, at 12 noonAbstract
Oversampling data converters based on Delta-Sigma modulation are a popular solution for modern high-resolution applications. In the design of digital-to-analog or analog-to-digital Delta-sigma converters there are common obstacles due to the difficulties on predicting and verifying their performance. Being a highly nonlinear system, a Delta-Sigma modulator’s (DSM) quantization noise and therefore the spurious tones are difficult to analyze and predict.
Multi-bit DACs can be used to improve the performance and linearize the behavior of DSMs. However, this will give rise to the need for linearizing the multi-bit DAC. A popular DAC linearization method, data weighted averaging (DWA) shapes the DAC mismatch noise spectrum. There are many variants of DWA, for low-pass and band-pass DSMs. This thesis proposes a generalization which integrates a few published variants into one, broader DWA scheme. The generalization enables expanding the tone-suppression studies into a larger concept.
The performance of one- or multibit DSMs is usually verified by simulations. This thesis proposes a simulation-based qualification (characterization) method that can be used to repeatedly verify and compare the performance of multibit DSM with a DAC mismatch shaping or scrambling scheme.
The last contribution of this thesis is a very simple model for tonal behavior. The model enables accurate prediction of spurious tones from both DSMs and DWA-DACs. The model emulates the tone behavior by its true birth-mechanism: frequency modulation. The proposed prediction model for tone-behavior can be used for developing new tone-cancelation methods. Based on the model, a DWA linearization method is also proposed.Tiivistelmä
Delta-Sigma modulaatio on suosituin tekniikka ylinäytteistävissä datan muuntimissa. Riippumatta toteutustarkoituksesta (analogia-digitaali- tai digitaali-analogia-muunnos), Delta-Sigma (DS) modulaatiossa on yleisesti tunnettuja käyttäytymisen ennustamiseen liittyviä ongelmia. Nämä ongelmat ovat peräisin modulaattorin luontaisesta epälineaarisuudesta: DS-muunnin on nimittäin vahvasti epälineaarinen takaisinkytketty systeemi, jonka harhatoistojen ennustaminen ja analysointi on erittäin hankalaa.
Yksibittisestä monibittiseen DS-muuntimeen siirryttäessä muuntimen suorituskyky paranee, ja muuntimen kohinakäyttäytyminen on lineaarisempaa. Tämä kuitenkin kostautuu tarpeena linearisoida DS-muuntimen digitaali-analogia (D/A) muunnin. Tällä hetkellä tunnetuin linearisointimenetelmä on nimeltään DWA (data weighted averaging) algoritmi. Tässä työssä DWA:lle ja sen lukuisille varianteille esitellään eräänlainen yleistys, jonka avulla algoritmia voidaan soveltaa sekä alipäästö- että kaistanpäästö-DS-muuntimelle.
Kuten tunnettua, DS-modulaattorin analyyttinen tarkastelu on raskasta. Yksi- ja monibittisten DS-muuntimien suunnitellun käyttäytymisen varmistaminen tapahtuukin yleensä simulointien avulla. Työssä esitetään simulointiperiaate, jolla voidaan kvalifioida (karakterisoida) monibittinen DS-muunnin. Tarkemmin, kvalifioinnin kohteena on DWA:n kaltaiset D/A -muuntimien linearisointimentelmät. Kyseessä on pyrkimys ennen kaikkea toistettavaan menetelmään, jolla eri menetelmiä voidaan verrata nopeasti ja luotettavasti.
Tämän väitöstyön viimeinen kontribuutio on matemaattinen malli harhatoistojen syntymekanismille. Mallilla sekä DS-muunnoksen että DWA-D/A -muunnokseen liittyvät harhatoistot voidaan ennustaa tarkasti. Harhatoistot mallinnetaan yksinkertaisella havaintoihin perustuvalla FM-modulaatiokaavalla. Syntymekanismin mallinnus mahdollistaa DS-muuntimien ennustettavuuden ja täten auttaa harhatoiston kumoamismenetelmien kehittämistä. Työssä esitetään yksi matemaattisen mallin avulla kehitetty DWA-D/A -muunnoksen linearisointimenetelmä
Non-traditional architectures for AD- and DA-converters
No full textTraditional AD-converters of cyclic or pipeline type normally use algorithms that create offset binary output code. The input sample is converted starting with the most significant bit (MSB) and ends with the least significant bit (LSB), giving a total of N bits. In cyclic converters this is achieved by one processing element resolving a number of bits, M, with the residue voltage is scaled by M and fed back to the input in a recursive manner in a loop. For pipeline converters this loop is rolled out, using one processing element for each set of M bits and using N/M processing stages. Current popular state-of-the-art converter architectures use M=1 and M=1.5, with error correction for the 1.5 bit case. Cyclic converters are normally used for medium speed operation and can be designed for extremely small silicon area and power consumption, while pipeline converters can be very high speed at the cost of more area and power consumption. Nonidealities in the processing elements, such as capacitor mismatch, amplifier and comparator offsets, signal dependent and independent charge injection, finite OTA gain- and bandwidth and noise will induce errors in the residue voltages that eventually affect the accuracy of the converter limiting its resolution [1],[2]. The errors can be both random and systematic. Normally these errors are addressed by circuit level improvements meant to reduce their magnitude. Alternately, some of the errors can be mitigated at the block level, especially the systematic errors. The use of Gray coding [3] achieves a lower accumulation of errors that depends on the bits generated. The net effect of Gray coding is to introduce only a gain difference, compared to an ideal converter. Two other alternatives are to slightly modify the Binary output code, by alternating the residue error sign at each cycle [4],[5], or alternate the sign for the MSB residue voltage [4]],[6]. These modifications improve the performance by several bits compared to traditional Binary coded converters. These improvements are obtained at no extra hardware cost, since only complementary binary outputs are needed, which are already available for fully differential realizations. For DA-converters the concept of cyclic and pipelined converters can easily be obtained, by reversing the operations for the ADC algorithms. The resulting DACs start with the LSB and the conversion is completed when the MSB is processed, either in a cyclic manner or pipelined. The input signal can be Binary coded, alternate Binary coded or Gray coded [7]-[9]. Substantial performance improvements are achievable also for DACs at the block level by modifying the digital input code format in a similar manner as for ADCs. Traditional high-performance DACs are normally built as two-stage converters, using one coarse and one fine stage using combinations of R2R ladders and Binary weighted current sources. The outputs are for most designs a current. In order to achieve low thermal noise the terminating resistor is small, resulting in a large power consumption. The techniques described above allow one to use voltages as outputs, giving potential advantages in power consumption. This paper gives a brief overview of the alternate architectures for ADCs and DACs using simple algorithm modifications at the block level and the possible performance improvements are motivated and verified.</p
Going Beyond Counting First Authors in Author Co-citation Analysis
Get PDFThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Get PDF“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
Get PDFWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Swedish system-on-chip conference focuses on meter to nanometer scale electronics R&D
No full textA Novel Power Allocation Strategy for Finite Alphabet in MIMO Systems
No full textOne of the significant benefits of Multiple-Input-Multiple-Output (MIMO) for wireless applications is the high spectral efficiency it can achieve. Water filling (WF) has long been deemed as the optimal power allocation strategy to maximize the spectral efficiency. However, the high complexity of this algorithm is annoying in the case of finite alphabet. The current paper suggests a novel power allocation strategy in the context of finite alphabet that is much simpler than WE It can achieve 95% of the spectral efficiency of WF in the i.d.d. Rayleigh fading channel, and even outperform WF in highly correlated fading channel, e.g. the line-of-sight (LOS) Ricean fading channel.</p
Asymptotic Performance of MMSE MIMO Systems Using Adaptive Modulation
No full textThis letter investigates the asymptotic performance of minimum-mean-square error (MMSE) in MIMO systemsusing adaptive modulation. The asymptotic average spectral efficiency and bit-error rate (BER) are derived basedon three approximations of the probability density function (p.d.f.) of effective SNR. Simulations suggest that themost accurate estimation of average spectral efficiency is obtained by using Gamma distribution.</p
Implementation aspects of generalized bandpass sampling
No full textBandPass Sampling (BPS) realizes frequency down-conversion in radio receiver front-ends by a sampling rate that can be slightly larger than twice the information bandwidth compared to twice the highest frequency for traditional LowPass Sampling (LPS). However, some implementation problems, harmful signal spectral folding, noise aliasing and sampling jitter, are unavoidably present in conventional BPS systems. Under recent research, generalized bandpass sampling combined with filtering has been proposed for dealing with these problems. In this paper, the novel sampling architectures with intrinsic FIR and IIR filtering are implemented using a sampled-data technique called Switched-Capacitor (SC) circuit technique. Specifically complex SC filtering is designed and analyzed. Both the analysis and simulation results show that the designed complex SC filter fulfils the expectations of generalized bandpass sampling.</p
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