1,720,966 research outputs found
Development of a payload for the characterization of fram microcontrollers to radiations
Full text linkThe space radiation environment can have serious effects on spacecraft electronics. The effect of incoming cosmic rays of galactic, solar origin and their interaction with the Earth's magnetic field limit system endurance and reliability. Transient effects from individual high-energy protons or heavy ions can in fact disrupt system operation irreversibly causing system faults that can be very dangerous. To test radiation effects on COTS FRAM-microcontrollers, we created a payload tile for the AraMIS-C1 structure (modular architecture for small satellites, developed by Politecnico di Torino) called 1B521 Radiation Characterization Payload. The satellite that includes this payload will be launched in a LEO (Low Earth Orbit) approximately between 600-800 km distance from the Earth. Spacecraft systems operating in this area must be hardened to withstand the radiation environment, and the electronics must be designed with several layers of redundancy. The damages produced by radiations are the cumulative effects of the dose received (TID) that can cause functional failures, and the effects of a single particle hit (SEE) that mainly cause single event upset (SEU) and single event latch-up (SEL). Finding SEU and SEL sensitivity of the microcontroller is the main goal of the mission. FRAM (ferroelectric memories) cells store the information as a PZT film polarization and a charged particle hit has a very small possibility to cause a change in the polarization. The ferroelectric dielectric leads to a different behaviour of the cell compared with a DRAM one, producing many advantages especially for what concerns the overall power consumption in read/write cycles and the non-volatility properties of the device. The problems due to ionizing radiation are in our opinion concentrated in the CMOS logic surrounding the memory array. Our payload is hosted in a board included in a 1U Cubesat satellite. The board presents two identical microcontrollers MSP430FR6989 (Texas Instruments) that run the same program, but one uses software hardening techniques that should prevent malfunctions due to transient errors like SEUs and SEFI. We also monitor SELs and when such an event is detected the system will power cycle the payload to prevent physical damage. The on-board computer of the satellite monitors the behaviour of the payload, logging any malfunctioning and creating an error report. We are waiting for a launch opportunity to get live data and verify our assumption that FRAM based microcontrollers can be extremely useful in low cost university satellites and to test the effectiveness of software hardening
Enhancement of a 2D array processor for an efficient implementation of visual perception tasks
No full textThe low-level processing of images is generally a heavy step in vision applications, because the computations, even if very simple, must be iterated for every pixel in the image. Nevertheless, sometimes the processing has a different relevance for different image areas. This fact allows to decrease the number of computations, skipping the pixels which would not produce significant results, and implementing a sort of multiple focus of attention. The authors present a hardware extension devoted to the implementation of a data-driven focus of attention on PAPRICA architecture, but can be applied to any SIMD array processor using the same processor virtualization mechanism as PAPRICA. The focus of attention mechanism can be used both to implement different elaborations on different image areas, and to skip the elaboration where it is useless, improving the performances with respect to a traditional architecture
High-level and low-level computer vision: Towards an integrated approach
No full textThe term perception refers to the means by which information acquired from the environment via the sense organs is transformed into experiences of objects, events, sounds, tastes, etc. In this paper, we shall focus on the problem of object perception dealing exclusively with the visual modality. More precisely we will present a system, SVL - Symbolic Vision Lab, which is a development environment for object perception algorithms. SVL is mainly devoted to symbolic computation and can exploit for low level tasks a massively parallel computer, such as the general purpose Connection Machine, or an ad hoc specific VLSI architectures whose efficiency can be simulated in advance on the Connection Machine itself
Signal integrity: An interactive multimedia course
No full textThe main bottleneck in high speed digital processing systems comes interconnections. An understanding of the "signal integrity" problems is mandatory for digital systems designer, but requires familiarity with the analog and high frequency domains. A CD-ROM on Electromagnetic Compatibility with a section on signal integrity attempts to bridge the gap, by providing an application-oriented description of problems and solutions, with extensive use of interactive multimedia
The seu risk assessment of Z80A, 8086 and 80C86 microprocessors intended for use in a low altitude polar orbit
No full textThis paper presents the results of a test and analysis program carried out in support of an Earth Resources Satellite project in order to provide a quantitative SEU risk assessment for certain microprocessor based subsystems. The key features of the program were the low cost and comparative simplicity of the test techniques which, nevertheless, provided sufficient data for a quantitative risk assessment using the CREME suite of programs. Copyright © 1986 by The Institute of Electrical and Electronics Engineers, Inc
The PAPRICA SIMD array: Critical reviews and perspectives
No full textThe PAPRICA project started in 1988 as an experimental VLSI architecture devoted to the efficient computation of data with two-dimensional structure. The main goal of the project is to develop a subsystem that could operate as an attached processing unit to a standard workstation and in perspective as a specialized processing module in dedicated systems devoted to low level image analysis, cellular neural networks emulation, DRC algorithms. The architecture has been extensively used for basic low level image analysis tasks up to optical flow computation and feature tracking, showing encouraging performance even in the first prototype version. The authors discuss the actual implementation and present a critical analysis of the project, allowing to identify some crucial points of PAPRICA design (and of array processors in general) that must be carefully considered in the case of redesign
The Paprica massively parallel processor
No full textThis paper describes a complete 6-year project, starting from its theoretical basis up to the hardware and software system implementation, and to the description of its future evolution. The main goal of the project is to develop a subsystem that operates as a processing unit attached to a standard workstation and in perspective as a low-cost low-sized specialized embedded system devoted to low level image analyses and cellular neural networks emulation. The architecture has been extensively used for basic low level image analysis tasks up to optical flow computation and feature tracking, showing encouraging performances even in the first prototype version
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
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