1,721,649 research outputs found
The SuperB Silicon Vertex Tracker and 3D vertical integration
Full text linkThe construction of the SuperB high luminosity collider was approved and funded by the Italian government in 2011. The performance specifications set by the target luminosity of this machine (> 10^36 cm^-2 s^-1) ask for the development of a Silicon Vertex Tracker with high resolution, high tolerance to radiation and excellent capability of handling high data rates. This paper reviews the R&D activity that is being carried out for the SuperB SVT. Special emphasis is given to the option of exploiting 3D vertical integration to build advanced pixel sensors and readout electronics that are able to comply with SuperB vertexing requirements
Status and perspectives of deep N-well 130nm CMOS MAPS
No full textDeep N-Well (DNW) MAPS were developed in two different flavors to approach the specifications of vertex detectors in dissimilar experimental environments such as the Super B-Factory and the ILC. The first generation of MAPS with on-pixel data sparsification and time stamping capabilities is now available and was tested in a beam for the first time in September 2008. These devices are fabricated in a commercial 130 nm CMOS process, and the triple well structure available in such an ultra-deep submicron technology is exploited by using the deep N-well as the charge-collecting electrode. Because of the high integration density of such a technology, complex digital functions can be included in each pixel, implementing a sparsified readout architecture of the pixel matrix with time stamping.
This paper reviews the features of the "ILC class" and "SuperB class" MAPS devices, discussing their different design in terms of pixel pitch, analog signal processing, and digital readout architecture. For SuperB, a data-driven, continuously operating readout scheme was adopted along with a macropixel matrix arrangement, whereas for the ILC the matrix is read out in the long inter-train period. In both versions, the address of hit pixels is transmitted off-chip along with the time stamp. The experimental performance of the chips provides an assessment of the Deep N-Well MAPS potential in view of future applications.
The paper also discusses the way forward in the development of these devices, outlining the issues that have to be tackled to design full size Deep N-Well MAPS for actual experiments. These sensors could take advantage from technological advances in microelectronic industry, such as vertical integration. The impact of these new technologies on the design and performance of DNW pixel sensors could be large, with potential benefit for various device features, from the charge collection properties to the digital readout architecture
The path towards the application of new microelectronic technologies in the AIDA community
Full text linkThe Workpackage 3 of the AIDA project has the goal of facilitating the access of the high energy physics community to the most advanced semiconductor technologies, from nanoscale CMOS to innovative interconnection processes. The AIDA network is studying 3D integration with the main goal of designing novel tracking and vertexing detector systems based on high-granularity pixel sensors, with aggressive and intelligent architectures for sensing, analogue and digital processing and storage, and data transmission. This talk reviews the ongoing efforts and discusses the challenges that are being tackled in this framework to qualify technologies and devices for actual applications
Advanced Pixel Sensors and Readout Electronics Based on 3D Integration for the SuperB Silicon Vertex Tracker
No full textThe potential of 3D integration of sensors and readout electronics is being explored in view of the demanding requirements of the innermost layer of the SuperB Silicon Vertex Tracker. This paper reviews the 3D designs that are targeting SuperB, which include CMOS active pixel sensors and front-end chips for fully-depleted, high-resistivity pixel sensors
Trends in the design of spectroscopy amplifiers for room temperature solid state detectors
No full textThis paper discusses the present trends in the design of low-noise front-end systems for room temperature semiconductor detectors. The technological advancement provided by submicron CMOS and BiCMOS processes is examined from several points of view. The noise performances are a fundamental issue in most detector applications and suitable attention is devoted to them for the purpose of judging whether or not the present processes supersede the solutions featuring a field-effect transistor as a front-end element. However, other considerations are also important in judging how well a monolithic technology suits the front-end design. Among them, the way a technology lends itself to the realization of additional functions, for instance, the charge reset in a charge-sensitive loop or the time-variant filters featuring the special weighting functions that may be requested in some applications of CdTe or CZT detector
Status and perspectives of pixel sensors based on 3D vertical integration
No full textThis paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors
Properties and performance of the prototype instrument for the Pierre Auger observatory
No full textConstruction oft he first stage of the Pierre Auger Observatory has begun. The aim of the Observatory is to collect unprecedented information about cosmic rays above 1018 eV: The first phase ofth e project, the construction and operation ofa prototype system, known as the engineering array, has now been completed. It has allowed all of the sub-systems that
will be used in the full instrument to be tested under field conditions. In this paper, the properties and performance of these
sub-systems are described and their success illustrated with descriptions ofso me of the events recorded thus far
A study for the detection of ionizing particles with phototransistors on thick high-resistivity silicon substrates
No full textWe report on bipolar NPN phototransistors fabricated at ITC-IRST on thick high-resistivity silicon substrates. The phototransistor emitter is composed of a phosphorus n+ implant, the base is a diffused high-energy boron implant, and
the collector is the 600–800 mm thick silicon bulk, contacted on the backplane. We have studied the current amplification for two different doping profiles of the emitter, obtaining values of b ranging from 60 to 3000. For various emitter and base configurations, we measured the static device characteristics and extracted the leakage currents and the base resistance, verifying the fundamental relationship between them and the total base capacitances. The use of such
phototransistors to detect ionizing particles is exploited and discussed
“Instrumentation for High Accuracy Noise Characterisation of Front-End Devices in Detector Applications”.
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