1,721,169 research outputs found
Off-state breakdown of GaAs PHEMTs: review and new data
No full textThis paper reviews the literature dealing with offstate
gate-drain breakdown in MESFET and HEMT structures,
with particular emphasis on GaAs PHEMTs, in terms of: 1) the
physics of the breakdown phenomenon; 2) the breakdown walkout
effect; 3) the impact of design and process choices on the breakdown
behavior; and 4) the experimental techniques used for breakdown
characterization. A thorough temperature-dependent breakdown
characterization of commercial PHEMTs is also shown and
discussed. It is found that different physical mechanisms may dominate
the gate-drain leakage depending on the reverse bias and
temperature range considered, and the particular PHEMT technology.
The main results shown here tell us the following. 1) The
breakdown voltages are decreasing functions of temperature between
room temperature and 160°C. 2) Between room temperature
and 90–100°C, thermionic-field emission seems be dominant,
with low activation energies below 0.15 eV; as a consequence, the
temperature dependence of the breakdown voltage is weak. 3) Between
110°C and 160°C, higher activation energy mechanisms
(possibly trap-assisted tunneling and thermionic emission over a
field-dependent barrier) tend to dominate, and the temperature dependence
of the breakdown voltages is stronger
Numerical analysis of the extraction of barrier height and Richardson constant of Schottky contacts on AlGaAs/GaAs heterostructures
No full textThe extraction of barrier height and Richardson constant by means of I–V measurements as a function of temperature has been simulated for Al Schottky contacts on AlGaAs/GaAs heterostructures. Different sources of inaccuracies have been studied, and the dependence of the extracted values on the heterojunction features (conduction band discontinuity, electron velocity across the junction, distance from the Schottky contact) has been considered. Although the diodes show nearly ideal characteristics, relevant errors are observed in the extracted values of barrier height and Richardson constant
Breakdown and high-field reliability issues in heterojunction FETs for microwave power amplification
Full text linkHigh-field reliability issues connected with hot electron and impact ionization are typically the reliability bottleneck of power FETs for microwave and millimeter-wave applications. This work deals with some aspects of this problem, from characterization and accelerated stressing techniques to the physical degradation mechanisms, using power AlGaAs/GaAs HFETs as a test vehicle
A physical model of the behavior of GaAs MESFETs in the linear region
No full textIn this paper we present a physical description of the DC behavior of GaAs MESFETs for MMICs biased in the linear region. The model is based on the Gradual Channel Approximation and on a consistent method to extract gate bias dependent source and drain parasitic resistances. Several devices with different geometries are considered, and good modeling results are obtained
High-electric field effects and degradation of AlGaAs/GaAs power HFETs: a numerical study
No full textThis work presents a numerical study of high-field degradation and reliability issues of AlGaAs/GaAs power HFETs. A commercial two-dimensional drift-diffusion tool is used to investigate electric-field distributions, the effects of electron capture at the device surface under hot-carrier conditions, and the impact of drain recess scaling on such effects. Wherever experimental data are available for direct comparison, a good match is observed with our simulations. The main results of this study are (1) a validation of the hypothesis that attributes the main high-field degradation effects to electron capture over the gate-drain access region, and (2) design indications pointing out to the possibility of a reverse correlation between the gate-drain breakdown voltage and the device hot-carrier reliability
A review of the use of electro-thermal simulations for the analysis of heterostructure FETs
No full textThis paper deals with using device-level numerical simulations for the investigation of the electro-thermal behavior of a GaAs-based
heterostructure FET. We show a way of dealing with the software/hardware limitations related with the huge disproportion between the
electrically active region and the volume relevant to heat outflow. We study very wide simplified structures to obtain guidelines for building
up a reduced grid and proper boundary conditions for the complete simulation of the electro-thermal behavior of the FET. As an
application example, we use this approach to simulate the military standard (MIL-STD) method for the measurement of the thermal
resistance of GaAs FETs, thus discussing its accuracy and limitations. We also show that in multi-finger structures a single channel temperature
such as that obtained by electrical thermal resistance extraction techniques cannot satisfactorily describe the FET’s thermal
behavior. Finally, we briefly dwell on a comparison between 2D and 3D simulations
A new technique to measure the thermal resistance of LDMOS transistors
No full textThis paper introduces a new dc technique for the
extraction of the thermal resistance of LDMOS transistors. The
new extraction method has distinctive advantages over existing
techniques: 1) it is based on dc measurements of the I–V output
curves at different ambient temperatures, thus requiring only
very standard and inexpensive equipment, with the exception of
a stable and accurate temperature control; 2) it does not need any
special layout or test structure, nor any knowledge of the physical
structure of the device under test; and 3) it can be applied to both
packaged and on-wafer FETs. We applied the new technique to
LDMOS transistors with a wide range of gate widths, namely,
2.68–84.42 mm, obtaining well-behaved and consistent results.
A comparison of the new method with a standard extraction
technique based on short-pulsemeasurements at different ambient
temperatures showed substantial agreement between the two
On state breakdown in PHEMTs and its temperature dependence
No full textThis work shows results of temperature-dependent (from −40 °C to 140 °C) on-state breakdown characterization of commercial PHEMTs from two vendors. Our data shows that in both samples impact ionization in the channel dominates the breakdown phenomenon and that a classical and simple analytical model can describe it with good accuracy. We have observed negligible temperature dependence of impact ionization in one of the samples, while the other shows moderate reduction of impact ionization with increasing temperature
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