1,721,012 research outputs found

    Semi-Automated Experimental Set-Up for CAD-oriented Low Frequency Noise Modeling of Bipolar Transistors

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    The present work addresses the hardware and software development of a semi-automated experimental set-up devoted to the extraction of low frequency noise compact models of bipolar transistors for microwave circuit applications (e.g. oscillators). The obtained experimental setup is applied to GaInP/GaAs Heterojunction Bipolar Transistors

    Going Beyond Counting First Authors in Author Co-citation Analysis

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    The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed

    Very High Power Field-Plate GaAs PHEMT technology for C and X -band applications

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    Very high voltage breakdown pHEMTs have been successfully developed by implementing a field-plate (FP) gate structure. Devices with and without FP, in which the FP is simply connected to the gate contact, have been fabricated on the same wafer in order to compare the improvements induced by adopting the FP. As expected FP devices showed smaller drain current dispersion than standard devices under pulsed DC measurement conditions. Moreover off-state breakdown voltage improved from -25 V, for the devices without FP, up to -40 V for the field-plated devices. Electron Beam Lithography of the gate with Lg=0.25μm and i-line Stepper Lithography with Lg=0.5μm devices results have been compared. FP devices with effective gate length of 0.6 μm yielded output power levels as high as 1.6W/mm CW @ 4 GHz with PAE up to 50%. FP devices with effective gate length of 0.3 μm yielded a maximum available gain @10 GHz as high as 13 dB (Vds=8V) and 10 dB for Vds=15V. The fabricated structures were also evaluated by carrying out 2D numerical simulations. Experimental results on MISpHEMT devices have been explained by means of a donor trap located at the dielectric/semiconductor (namely SiN/GaAs) interface

    Physical simulation: a tool for technological evaluation and optimization of GaAs MESFET devices

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    The- paper presents a case study on the technological optimization of GaAs MESFETs by means of a. two-dimensional physical DC and small-signal simulator (MESS). Two examples are discussed, the first concerning the dose and recess optimization of an analog device, the second, the recess optimization of a MESFET series or parallel switch

    Large-signal modeling of power GaN HEMTs including thermal effects

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    In this paper a procedure to extract temperature dependent equivalent circuits for modeling the small and large signal behavior of GaN HEMTs is presented. The technique explained in this work uses pulsed I-V measurements to obtain the temperature dependence of the parameters describing the nonlinear drain current source behavior. The equivalent circuits extracted are capable of correctly modeling the DC, small signal and large signal characteristics of GaN HEMTs devices. Simulations and measurements carried out on three transistors developed by SELEX-SI are compared over a wide range of frequencies, bias and load conditions
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