4,786 research outputs found
Modelling delay and noise in arbitrarily coupled RC trees.
Closed-form equations for second-order transfer functions of general arbitrarily coupled resistance-capacitance (RC) trees with multiple drivers are reported. The models allow precise delay and noise calculations for systems of coupled interconnects with guaranteed stability and represent the minimum complexity associated with this class of circuits. Their accuracy is extensively compared against other relevant models and is found to be better or comparable to more expensive models. All results are derived from a theoretical approach, and their physical basis is examined. The simplicity, accuracy, and generality of the models make them suitable for use in early signal integrity analyses of complex systems and incremental physical optimization
Measurable parameters for performance of correded and repaired RC beams under load
Includes abstract.Includes bibliographical references.Structural engineers and asset managers rely on measurable parameters developed by researchers to predict residual load-bearing capacities of corroding in-service RC structures and to assess repair-effectiveness. Laboratory research that was used to develop these measurable parameters varied between researchers and in most cases, did not represent in-service conditions. As a result, they found different relations between measurable and non-measurable parameters which are unsafe and/or engineers find difficult to apply to in-service structures. A holistic research that emulates in-service conditions was therefore developed. Parameters that were looked at were corrosion crack widths and longitudinal strains together with their derivatives
A Compact 10-MHz RC Frequency Reference With a Versatile Temperature Compensation Scheme
This article presents the design and implementation of a compact CMOS RC frequency reference. It consists of a frequency-locked loop (FLL) that locks the period of a voltage-controlled oscillator (VCO) to the time an RC network takes to charge to a reference voltage. Conventionally, an RC time constant with a near-zero temperature coefficient (TC) is realized by using a trimmed network of resistors with different TCs. In this work, such a network is used to realize a temperature-dependent reference voltage whose TC cancels that of a single-resistor RC time constant. Compared with the conventional approach, which requires resistors with TCs of opposite polarity, the proposed approach can be implemented with resistors with TCs of similar polarity, and so it can be implemented in most CMOS processes. To compensate for RC spread, a trimmed capacitor is used to adjust the nominal frequency. Two prototype chips were made, one based on p- /n-polysilicon resistors and other based on silicided/p-diffusion resistors. Fabricated in a standard 180-nm CMOS technology, the polysilicon-based prototype has an active area of 0.01 mm2 and an absolute inaccuracy of ±2800 ppm from -45 °C to 125 °C with a fixed TC-trim and a one-point frequency trim. After one week of accelerated aging at 150 °C, however, significant drift (5000 ppm) was observed. The diffusion-based prototype exhibits greater inaccuracy (±14 400 ppm) but much less drift (600 ppm).Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic InstrumentationMicroelectronic
A CMOS Dual-RC frequency reference with ±250ppm inaccuracy from -45°C to 85°C
To comply with wired communication standards such as USB, SATA and PCI/PCI-E, systems-on-chip require frequency references with better than 300ppm accuracy. LC-based references achieve 100ppm accuracy [1], but suffer from high power consumption (∼20mW). Thermal diffusivity (TD) references require less power (∼2mW), at the expense of less accuracy (1000ppm) [2]. RC-based references offer the lowest power consumption, but their accuracy is typically limited to ∼0.1% [3]. In RC relaxation oscillators, comparator offset and delay are the major sources of inaccuracy [4,5]. References based on frequency-locked loops (FLLs) circumvent these by locking an oscillator's frequency to the time-constant of an RC filter, but their accuracy is then limited by the nonlinear temperature dependency of on-chip resistors [3,6].Session 3.3 Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Electronic Instrumentation(OLD)Applied Quantum ArchitecturesMicroelectronic
COHERENCE MULTIPLEXING OF FIBER-OPTIC INTERFEROMETRIC SENSORS
The authors would like to thank K. Bldtekjaer and C.
C . Cutler for helpful discussions
Recommended from our members
Architectural Implications of Automatic Parallelization With HELIX-RC
As classic Dennard process scaling fades into the past, power density concerns have driven modern CPU designs to de-emphasize the pursuit of single-thread performance, focusing instead on increasing the number of cores in a chip. Computing throughput on a modern chip continues to improve, since multiple programs can run in parallel, but the performance of single programs improves only incrementally. Many compilers have been designed to automatically parallelize sequentially written programs by leveraging multiple cores for the same task, thereby enabling continued single-thread performance gains. One such compiler is HELIX, which can increase the performance of a mixture of SPECfp and SPECint benchmarks by 2X on a 6-core Nehalem CPU.
Previous approaches to automatically parallelize irregular programs have focused on removing apparent dependences through thread-level speculation, which limits the type of code that can be targeted. In contrast, this dissertation increases the amount of code that can be parallelized by addressing the specific communication demands of that code. The dissertation proposes a special purpose extension of the cache hierarchy, called ring cache, to greatly reduce the perceived communication latency between cores running an automatically parallelized program. This co-design of ring cache and the HELIX compiler, called HELIX-RC, increases the speedup of 10 SPEC benchmarks running on 16 simulated in-order cores from an average of 2X to an average of over 8X. Speedups are slightly reduced to 7X on out-of-order cores, which extract instruction-level parallelism on their own. A fully synthesized Verilog implementation of ring cache is evaluated and is shown to consume less than 25mW of power with an area of less than
0.275 square millimeters.
This dissertation includes a study comparing single program per core multiprogramming and HELIX-RC. Counterintuitively, some HELIX-RC parallelized benchmarks not only surpass simple multiprogramming in terms of single program performance, but can also beat multiprogramming in terms of total multicore throughput by reducing the effective per-core working set of a program.
With communication bottlenecks removed by ring cache, automatic parallelization with HELIX-RC restores a decade of lost single-thread performance improvements.Engineering and Applied Sciences - Engineering SciencesAutomatic parallelization; Compiler-architecture co-desig
Experimental and theoretical investigation of crack width calculation methods for RC ties
This paper theoretically and experimentally investigates the semi-empirical formulas recommended by Eurocode 2 (EC2), fib Model Code 2010 (MC2010), and Eurocode 2 with the German National Annex (DIN) for calculating crack widths in reinforced concrete. It is shown that the formulas can be derived from the principles for the idealized behavior of RC ties. However, instead of explicitly solving the resulting differential equations, the use of simplifications leads to inconsistent formulas. An experimental study was carried out involving the testing of eight RC ties to discover the modeling uncertainty of the formulas. It was found that EC2 substantially overestimated the crack widths for the RC ties. MC2010 and DIN seemed to predict the crack widths better, but gave rather a large number of nonconservative crack width predictions. These experimental results, combined with the theoretical study, suggest that a more consistent calculation model should be formulated by explicitly solving the resulting differential equation.Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Applied Mechanic
RC SMOOTHING OF SPECTRA
Author Institution: Department of Physics, Michigan State University East LansingBy convoluting an exponential function with calculated spectra consisting of single and multiple sets of lines of various widths and line shapes, we have determined the effects that time constant (RC) has on recorded spectra. For equivalent experiments, in which the scanning rates d/dt are equal, we have concluded that the optimum value of RC is essentially independent of whether the spectrum is to be digitized or not, and independent of the sampling rate if digitization is used. A trade-off among the desirable and undesirable effects of RC leads us to recommend a value of RC about one-tenth of the full width at half height of the sharpest individual lines in the observed spectrum. This research was supported by a grant from the National Science Foundation
Nonlinear analysis to investigate effect of connection type on behavior of steel plate shear wall in RC frame
In the reinforced concrete (RC) structures with steel plate shear walls (SPSWs) as a lateral resisting system, to obtain maximum capacity of SPSW, implementing proper connections play an important role to transfer force from wall to the frame. In this paper, four connection types are proposed and numerically investigated to transfer the tension field forces between SPSW and RC frame (RCF). Three types of connections are applicable for rehabilitating of existing RC structures and one type can be used for new construction. The behavior of connections has been evaluated using non-linear finite element analysis (NLFEA). Results of the specimens with different types of connections demonstrated that the use of SPSW in RCF with appropriate connections could provide excellent ductility as well as high load carrying capacity and initial stiffness by distributing the yielding zone in SPSW along the wall height
AgnostiqHQ/covalent: v0.234.1-rc.0
<h2>[0.234.1-rc.0] - 2024-05-10</h2>
<h3>Authors</h3>
<ul>
<li>Andrew S. Rosen <a href="mailto:[email protected]">[email protected]</a></li>
<li>Sankalp Sanand <a href="mailto:[email protected]">[email protected]</a></li>
<li>Co-authored-by: Alejandro Esquivel <a href="mailto:[email protected]">[email protected]</a></li>
<li>Casey Jao <a href="mailto:[email protected]">[email protected]</a></li>
<li>Co-authored-by: Santosh kumar <a href="mailto:[email protected]">[email protected]</a></li>
</ul>
<h3>Fixed</h3>
<ul>
<li>Sublattice electron function strings are now parsed correctly</li>
<li>The keys of dictionary inputs to electrons no longer need be strings.</li>
<li>Fixed inaccuracies in task packing exposed by no longer uploading null attributes upon dispatch.</li>
</ul>
<h3>Operations</h3>
<ul>
<li>Fixed nightly workflow's calling of other workflows.</li>
<li>Fixed input values for other workflows in <code>nightly-tests</code> workflow.</li>
</ul>
<h3>Operations</h3>
<ul>
<li>Removing author email from changelog action</li>
<li>Fixed nightly worfkflow's calling of other workflows.</li>
</ul>
- …
