117,735 research outputs found
Appending On-Line Fault Detection Mechanisms into Application Code to Handle EMI in Embedded Electronics: A Case Study
Supporting migrant entrepreneurs in entrepreneurial ecosystems: Insights from Milan
Human capital and social networks are two pillars of Entrepreneurial Ecosystems (EEs), which are nowadays increasingly shaped by international migration flows. Migrant entrepreneurs are at the same time locally present and culturally diverse from the mainstream host society, thus being prone to separation from the native community and participation to different social clusters, characterized by different venture types and access to institutions. Public agencies and incubators might be pivotal in facilitating the socialization of migrant entrepreneurs and the networked reciprocal exchange with other entrepreneurs. This paper sheds light on this overlooked issue by drawing on explorative interviews in Milan, Italy, in two incubators and the municipality. The findings show how the attraction and inclusion of migrant entrepreneurs is influenced both by EE attributes and by actors’ strategies and culture. This work offers novel insights contributing to the literature and policymaking on entrepreneurship and ecosystems
Entrepreneurial teams: An input-process-outcome framework
Entrepreneurship research emphasizes the importance of the individual entrepreneur in both venture creation and growth. However, theory and practice suggest that the vast majority of new ventures are now team-based, and teams play a key role in venture success. As the scholarly interest in this topic has substantially grown in the recent years, the literature has flourished in a rather fragmented way. In this paper, we take a holistic view and systematise more than 250 papers on entrepreneurial teams, published over 30 years. We use a process approach (i.e., Input-Process-Outcome), depicting team evolution phases, from inception to maturity, linking them to firm performance. We identify gaps, highlighting opportunities for future research
A Hybrid Approach for Detection and Correction of Transient Faults in SoCs
Critical applications based on Systems-on-Chip (SoCs) require suitable techniques that are able to ensure a sufficient level of reliability. Several techniques have been proposed to improve fault detection and correction capabilities of faults affecting SoCs. This paper proposes a hybrid approach able to detect and correct the effects of transient faults in SoC data memories and caches. The proposed solution combines some software modifications, which are easy to automate, with the introduction of a hardware module, which is independent of the specific application. The method is particularly suitable to fit in a typical SoC design flow and is shown to achieve a better trade-off between the achieved results and the required costs than corresponding purely hardware or software techniques. In fact, the proposed approach offers the same fault-detection and -correction capabilities as a purely software-based approach, while it introduces nearly the same low memory and performance overhead of a purely hardware-based on
Technique based on On-Chip Current Sensors and Neighbourhood Comparison Logic to detect resistive-open defects in SRAMs
Assessment
This handbook was created as a part of the SOCCES project. SOCCES stands for SOCial Competences, Entrepreneurship and Sense of Initiative – Development and Assessment Framework. SOCCES was a two-year project running from 1/2/2015 to 31/1/2017 and funded by European Commission Erasmus+ Programme. It involved seven partners from six European countries. The aim was to develop an assessment framework for transversal competences. SOCCES focused two competences, Sense of Initiative and Entrepreneurship, and Social Competences.
This handbook provides teachers with the means to:
- Define and describe these entrepreneurial and social competences for their students
- Support students with the development of these competences in an inclusive, virtually enabled setting
- Assess and provide feedback to their students on how they are progressing in the development of entrepreneurial and social competences
And it provides learners with:
- The means to describe, self-assess and benchmark their entrepreneurial and social competences
- The language to articulate these competences to others such as teachers and employers
- A means to develop with them in an accessible, virtually enabled environment
This project received funding from the European Union’s Erasmus+ Programme under grant agreement N° 2014-1-UK01-KA203-00166
Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices
Enabling concurrent clock and power gating in an industrial design flow
Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way that the clock-gating information can be used to drive the control signal of the power-gating circuitry, thus providing additional leakage minimization conditions w.r.t. those manually inserted by the designer. This conceptual integration, however, poses several challenges when moved to industrial design flows. Although both clock and power-gating are supported by most commercial synthesis tools, their combined implementation requires some flexibility in the back-end tools that is not currently available. This paper presents a layout-oriented synthesis flow which integrates the two techniques and that relies on leading-edge, commercial EDA tools. Starting from a gated-clock netlist, we partition the circuit in a number of clusters that are implicitly determined by the groups of cells that are clock-gated by the same register. Using a row-based granularity, we achieve runtime leakage reduction by inserting dedicated sleep transistors for each cluster. The entire flow has been benchmarked on a industrial design mapped onto a commercial, 65 nm CMOS technology library
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