International Journal of Research and Engineering
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Design and development of prototype three level NPC inverter for industrial application
The requirement of electricity in India is increasing at a high rate. Severe energy crisis has forced the world to develop new and alternative methods such as the use of advanced power electronic systems. Therefore most of the utilities utilizes sufficient electricity and transmit the additional power to grid. One of the methods proposed is solar photovoltaic integrated with the battery storage. Here, solar photovoltaic are integrated with battery using a three level Neutral Point Clamped (NPC) Inverter. A three level Neutral Point Clamped Inverter is integrated using two new configurations or techniques-New Configuration i.e., Space Vector Modulation Technique, which generates balanced capacitor voltage under unbalanced DC voltage. Design and theoretical framework of the modulation technique has been proposed. A new control algorithm has been introduced in order to control the power delivery between the solar PV, battery, grid which uses Maximum PowerPoint Tracking (MPPT) technique
A Distributed Generation Based Inverter for Voltage Control in Distribution System
In recent years, DG penetration in the 8distribution systems has become faster and tangible. The implementation of DGs in the distribution network will likely lead to power quality problems, degradation in system reliability, reduced efficiency, over voltages and other safety issues. However, in the distribution network with a DG the voltage profile maintenance becomes important issue. This paper proposes the optimization technology based on the global information of distribution network is utilized to determine the control actions of voltage control equipments. At the same time, it tries to offer the ancillary services to the DN such as voltage regulation, and it tries to minimize DN active power losses and the reactive power exchanged with the DN by the DG units. The validation of the proposed control technique has been conducted through a several number of simulations.In recent years, DG penetration in the 8distribution systems has become faster and tangible. The implementation of DGs in the distribution network will likely lead to power quality problems, degradation in system reliability, reduced efficiency, over voltages and other safety issues. However, in the distribution network with a DG the voltage profile maintenance becomes important issue. This paper proposes the optimization technology based on the global information of distribution network is utilized to determine the control actions of voltage control equipments. At the same time, it tries to offer the ancillary services to the DN such as voltage regulation, and it tries to minimize DN active power losses and the reactive power exchanged with the DN by the DG units. The validation of the proposed control technique has been conducted through a several number of simulations
An Improved Variable -Sized Microaggregation Algorithm for Privacy Preservation (IV-MDAV)
Micro aggregation is a technique used to protect privacy in databases and location-based services. We propose a new hybrid technique for multivariate micro aggregation. Our technique combines a heuristic yielding fixed-size groups and a genetic algorithm yielding variable-sized groups. Fixed-size heuristics are fast and able to deal with large data sets, but they sometimes are far from optimal in terms of the information loss inflicted. On the other hand, the genetic algorithm obtains very good results (i.e. optimal or near optimal), but it can only cope with very small datasets. Our technique leverages the advantages of both types of heuristics and avoids their shortcomings. First, it partitions the data set into a number of groups by using a fixed- size heuristic. Then, it optimizes the partitions by means of the genetic algorithm. As an outcome of this mixture of heuristics, we obtain a technique that improves the results of the fixed-size heuristic in large data sets.INTRODUCTION- Over the last twenty years, there has been an extensive growth in the amount of private data collected about individuals. This data comes from a number of sources including medical, financial, library, telephone, and shopping records. Such data can be integrated and analyzed digitally as it’s possible due to the rapid growth in database, networking, and computing technologies. On the one hand, this has led to the development of data mining tools that aim to infer useful trends from this data. But, on the other hand, easy access to personal data poses a threat to individual privacy. This has lead to concerns that the personal data may be misused for a variety of purposes. Detailed person-specific data in its original form often contains sensitive information about individuals, and publishing such data immediately violates individual privacy
A New Approach in Demand Side Management through Ant Colony Optimization
To meet the fast growing demand of energy, smart techniques need to be adopted that are in compliance with the environment and energy conservation. An autonomous demand-side energy management is implemented to modify the electricity consumption pattern. In this paper, an importance of load factor is discussed. Load factors are an important simplification of electrical energy usage data and depend on the ratio of average demand to peak demand. The operating time of different labs and cost are analysed and it is optimized through ant colony. Simulation results shows that the proposed approach can maximize load factor.
Gated Latch Utilization For Clock Tree Network
The Major contributor to power dissipation using signal switching of high frequency and strong pipeline designs. Total power consumption using clock tree accounts and 20-40% of power is consumed in synchronous circuits. Therefore, by decreasing the clock-tree power, the chip power reduces. In this proposed system a circuit is implemented which is a frequency synthesizer for generating the clock tree. Then the gated latch technique is applied to this circuit for reducing the power consumption. The resulting output is the generation of the clock tree. The clock power can be controlled through gating. Primary goal is to reduce the power in the clock tree. Thus the clock tree synthesis is performed and gated latch technique is applied to the out coming clock signal from the clock tree. The gated latch is the concept of gating the control signal. The gated signal output plays the role of the enable in the latches. Thus whenever we need we can switch off the clock signal and we can use the clock signal for clock tree synthesis. These are all controlled by the control signal. The power consumed is 0.052
FPGA debug using incremental trace buffer
Design verification is an essential step in the development of any product. It ensures that the product as designed is the same as the product as intended. Software simulation is the common approach for validating hardware design unfortunately, it will take hours together to execute. Difficulties in validation arises due to the complexity of the design and also due to the lack of on chip observability. One common solution to this problem is to instrument the prototype using trace-buffers to record a subset of internal signals into on-chip memory for subsequent analysis. In the proposed system, an example circuit is implemented to perform the tracing operation and various trace buffers are designed to record the different stages of internal signal states. The resulting signal states are to be stored, like a error outputs. Low power methodologies are also implemented to achieve low power consumption. Thus the errors are separately stored in the memory for analyzing the signals. This might be used for changes in the logic wherever needed. Thus this tracing is performed to monitor signal states of an FPGA.Design verification is an essential step in the development of any product. It ensures that the product as designed is the same as the product as intended. Software simulation is the common approach for validating hardware design unfortunately, it will take hours together to execute. Difficulties in validation arises due to the complexity of the design and also due to the lack of on chip observability. One common solution to this problem is to instrument the prototype using trace-buffers to record a subset of internal signals into on-chip memory for subsequent analysis. In the proposed system, an example circuit is implemented to perform the tracing operation and various trace buffers are designed to record the different stages of internal signal states. The resulting signal states are to be stored, like a error outputs. Low power methodologies are also implemented to achieve low power consumption. Thus the errors are separately stored in the memory for analyzing the signals. This might be used for changes in the logic wherever needed. Thus this tracing is performed to monitor signal states of an FPGA
A comparative study of various MDAV algorithms
Microaggregation is an efficient Statistical Disclosure Control (SDC) perturbative technique for microdata protection. It is a unified approach and naturally satisfies k-Anonymity without generalization or suppression of data. Various microaggregation techniques: fixed-size and data-oriented for univariate and multivariate data exists in the literature. These methods have been evaluated using the standard measures: Disclosure Risk (DR) and Information Loss (IL). Every time a new microaggregation technique was proposed, a better trade-off between risk of disclosing data and data utility was achieved. Though there exists an optimal univariate microaggregation method but unfortunately an optimal multivariate microaggregation method is an NP hard problem. Consequently, several heuristics have been proposed but no such method outperforms the other in all the possible criteria. In this paper we have performed a study of the various microaggregation techniques so that we get a detailed insight on how to design an efficient microaggregation method which satisfies all the criteria
Artificial Neural Network Approach for Discriminating Various faults in Transformer Protection
This paper presents a new differential protection scheme based on Artificial Neural Network (ANN), which delivers effective distinguish between internal faults in a power transformer with the other disturbance such as various types of inrush currents and overexcitation conditions. In existing method, the internal faults only considered and the linear programming method detects the faults at one set value of the system i.e. it detects the faults only one particular type and it could not detect all the faults simultaneously. So the above problem is overcome by detecting the various types of faults in the system. In the proposed method Artificial Neural Network (ANN) techniques are used to detect all the types of faults in the power system. The Back Propagation Neural Network (BPNN) algorithm is used to train the process quickly. The neural network is trained with an input data set and it gives the output in the following aspects, relay tripping time and types of faults. The training process for NN and fault identification result is implemented using toolboxes on MATLAB/Simulink. Suppose the fault occurs in the system the ANN will trip the relay and the fault is isolated from the healthy system. When different types of faults occurs in the systems are restricted with 0.007 to 0.008s (7 – 8ms). The results endorse that the BPNN is faster, stable and more reliable to protect the power transformer from internal faults (three phase to ground fault, two phase to ground fault and single phase to ground fault) and other disturbance (overexcitation condition)
Seismic Behavior Of RC Building Frame With Steel Bracing System Using Various Arrangements
Steel bracing system is one of the effective measures for resisting the horizontal forces like seismic and wind forces in reinforced concrete multistory buildings. Bracing member’s are subjected to tension and compression; subsequently they are provided to take these forces. Steel bracing framework expands the stiffness and strength of the RC multistory building and reduces their deformation. Present study is based on seismic analysis of RC building frames with V type bracing and inverted V type bracing. Seismic coefficient method (linear static analysis) has been conducted to evaluate the effect of different arrangements of bracing members in the building frame and influence of the different steel cross-section. For this study, a fifteen story building assumed to be situated at seismic zone IV as per the seismic zone map of India. Three steel profiles ISA, ISMC and ISMB were utilized as bracing members by considering same cross-sectional area. For modeling and analysis work computer software StaadproV8i was used. Result of this study revealed that inverted V bracing reduces the bending moment, shear force, storey drift and node displacement significantly. It was also found that the various arrangements of bracing systems has great influence on seismic performance of the building frame and double angle section give better result as compared to ISMB and ISMC section
Wireless car parking allocation based on embedded system
With the rapid proliferation of vehicle availability and usage in recent years, finding a vacant car parking space is becoming more and more difficult, resulting in a number of practical conflicts. Parking problems are becoming ubiquitous and ever growing at an alarming rate in every major city. Wide usage of wireless technologies with the recent advances in wireless applications for parking, manifests that digital data dissemination could be the key to solve emerging parking problems. Wireless Sensor Network (WSN) technologies have attracted increased attention and are rapidly emerging due to their enormous application potential in diverse fields. This field is expected to provide an efficient and cost-effective solution to the effluent car parking problems. This paper proposes a Smart Parking Management System based on wireless sensor network technology which provides advanced features like remote parking monitoring, automated guidance, and parking reservation mechanism. The paper describes the overall system architecture of our embedded system from hardware to software implementation in the view point of sensor networks