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A new ordering and grouping algorithm for the linear weighted group matched filter successive interference cancellation detector
No full textA linear group-wise successive interference canceller in a synchronous CDMA system is considered in this work. The proposed hybrid detector that combines successive and parallel cancellation techniques makes use of advantages offered by the two techniques. The convergence of the hybrid interference cancellation (HIC) detector is guaranteed by an adjustable parameter that depends upon the largest eigenvalue of the system’s transition matrix. Since the largest eigenvalue is difficult to estimate, an upper bound is necessary for successful convergence. For this reason, we propose a new ordering and grouping algorithm that yields a tight upper bound, which, in turn, results in a higher convergence speed. Simulation results show that a significant improvement in performance is obtained with this technique is used. Moreover, we introduce the mathematical justification of the value of the adjusting parameter mentioned in [6] by using the bordering theorem
An OPNET-based Simulation Approach for Deploying VoIP
Get PDFThese days a massive deployment of VoIP is taking place over IP networks. VoIP deployment is a challenging task for network researchers and engineers. This paper presents a detailed simulation approach for deploying VoIP successfully. The simulation uses the OPNET network simulator. Recently OPNET has gained a considerable popularity in both academia and industry, but there is no formal or known approach or methodology in how OPNET can be used to assess the support and readiness of an existing network in deploying VoIP. Our approach and work presented in this paper predict, prior to the purchase and deployment of VoIP equipment, the number of VoIP calls that can be sustained by an existing network while satisfying QoS requirements of all network services and leaving adequate capacity for future growth. As a case study, we apply the simulation approach on a typical network of a small enterprise. The paper presents a detailed description of simulation models for network topology and elements using OPNET. The paper describes modeling and representation of background and VoIP traffic, as well as various simulation configurations. Moreover, the paper discusses many design and engineering issues pertaining to the deployment of VoIP. These issues include characteristics of VoIP traffic and QoS requirements, VoIP flow and call distribution, defining future growth capacity, and measurement and impact of background traffic
Evolutionary algorithms for VLSI multi-objective netlist partitioning
Get PDFoai::12The problem of partitioning appears in several areas ranging from VLSI, parallel programming to molecular biology. The interest in finding an optimal partition, especially in VLSI, has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. With current trends, partitioning with multiple objectives which includes power, delay and area, in addition to minimum cut is in vogue. In this paper, we engineer three iterative heuristics for the optimization of VLSI netlist bi-partitioning. These heuristics are based on Genetic Algorithms (GAs), Tabu Search (TS) and Simulated Evolution (SimE). Fuzzy rules are incorporated in order to handle the multi-objective cost function. For SimE, fuzzy goodness functions are designed for delay and power, and proved efficient. A series of experiments are performed to evaluate the efficiency of the algorithms. ISCAS-85/89 benchmark circuits are used and experimental results are reported and analyzed to compare the performance of GA, TS and SimE. Further, we compared the results of the iterative heuristics with a modified FM algorithm, named PowerFM, which targets power optimization. PowerFM performs better in terms of power dissipation for smaller circuits. For larger sized circuits, SimE outperforms PowerFM in terms of all the three objectives, delay, number of nets cut, and power dissipation. (C) 2005 Elsevier Ltd. All rights reserved
Avoidance of Priority Inversion in Real Time Systems Based on Resource Restoration
Get PDFPriority inversion is a problem that occurs in concurrent processes when low-priority threads hold shared resources required by some high-priority threads, causing the high priority-threads to block indefinitely. This problem is enlarged when the concurrent processes are in a real time system where high- priority threads must be served on time. A novice approach for avoiding the priority inversion problem is presented for processes in real time systems. This approach is based on backing up and restoring the shared resources. A low priority thread always starts on a shadow version of the shared resource, the original resource remains unchanged. When a high-priority thread needs a resource engaged by a low-priority thread, the low priority thread is preempted, the original resource is restored and the high-priority thread is allowed to use the original resource. The approach has been implemented in Java and the experimental results are fetched which verify that the approach is very suitable for real time systems where high-priority threads must be served on time
MULTISCALE EDGE DETECTION USING WAVELET MAXIMA FOR IRIS LOCALIZATION
Get PDFAutomated personal identification based on biometrics has been receiving extensive attention over the past decade. Iris recognition, as an emerging biometric recognition approach, is becoming a very active topic in both research and practical applications and is regarded as the most reliable and accurate biometric identification system available. Common problems include variations in lighting, poor image quality, noise and interference caused by eyelashes while feature extraction and classification steps rely heavily on the rich textural details of the iris to provide a unique digital signature for an individual. As a result, the stability and integrity of a system depends on effective localization of the iris to generate the iris-code. A new localization method is presented in this paper to undertake these problems. Multiscale edge detection using wavelet maxima is discussed as a preprocessing technique that detects a precise and effective edge for localization and which greatly reduces the search space for the Hough transform, thus improving the overall performance. Linear Hough transform has been used for eyelids isolating, and an adaptive thresholding has been used for eyelashes isolating. A large number of experiments on the CASIA iris database demonstrate the validity and the effectiveness of the proposed approach
Design Structural Stability Metrics and Post-Release Defect Density: An Empirical Study
Get PDFThis paper empirically explores the correlations between a suite of structural stability metrics for object-oriented designs and post-release defect density. The investigated stability metrics measure the extent to which the structure of a design is preserved throughout the evolution of the software from one release to the next. As a case study, thirteen successive releases of Apache Ant were analyzed. The results indicate that some of the stability metrics are significantly correlated with post-release defect density. It was possible to construct statistically significant regression models to estimate post-release defect density from subsets of these metrics. The results reveal the practical significance and usefulness of some of the investigated stability metrics as early indicators of one of the important software quality outcomes, which is post-release defect density
A Portable Clock Recovery Circuit (CRC) For Systems-On-Chip Serial Data Communication
Get PDFAn all-digital clock recovery circuit that is capable of extracting the clock embedded in the serial data stream is presented. The new CRC can retime the output clock with the received data within two bit transitions. The absence of analog filters or other analog blocks gives it a much smaller area than conventional circuitry. Also, being fully-digital, it can be described, simulated and synthesized using hardware description languages and be ported to any technology (thus supporting system on a chip designs). Circuit operation and performance was demonstrated using a 0.13??m, 1.2V CMOS technology and T-Spice?? simulations