International Journal of Reconfigurable and Embedded Systems (IJRES)
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Analysing feature selection: impacts towards forecasting electricity power consumption
Get PDFThis study focuses on the development of electrical power forecasting based on electricity usage in Wuzhou, China. To develop a forecasting model, the important features need to be identified. Therefore, this study investigates the performance of the feature selection method, focusing on the mutual information as a filter and random forest as a wrapper-based feature selection. From the experiment, six features have been chosen, whereby both feature selection methods chose almost identical features. Later, the selected features are trained and tested with common machine learning models, namely random forest regressor, support vector regression (SVR), k-nearest neighbor (KNN) regressor, and extreme gradient boosting (XGBoost) regressor. The performances of the feature selections tested on each of the models are measured in terms of mean absolute error (MAE), root mean square error (RMSE) and coefficient of determination (R²). Findings from the experiment revealed that XGBoost outperform the other machine learning models with RMSE 0.9566 and R² indicated with 0.2561. However, SVR outperformed XGBoost and other model by obtaining MAE 0.6028. It can be concluded that the performance of filter-based outperformed the embedded feature selection
Implementation of flexible axis photovoltaic system based on internet of things
Get PDFElectricity is a crucial aspect in human life. With population growth, ongoing regional development, and continuous construction activities, the demand for electricity and fuel in Indonesia is increasing. The substantial power consumption leads to larger financial expenditures for the community. Additionally, the use of electricity, as it has been traditionally employed, has negative environmental impacts. Solutions are needed to address these issues, and one effort involves the use of renewable energy, such as the development of solar power plants (PLTS). PLTS, also known as solar cells, is preferred as it can be used for various relevant purposes in different locations, particularly in offices, factories, residential areas, and others. However, the use of static, single-axis, and dual-axis solar panels still has drawbacks, such as suboptimal sunlight intensity and high motor power consumption. Therefore, a flexible-axis solar panel tracking system has been developed to follow the direction of sunlight, ensuring optimal power efficiency, and significant electricity generation. The flexible-axis tracker system results in a 34.13% increase in power efficiency
FPGA-based implementation of a substitution box cryptographic co-processor for high-performance applications
Get PDFThe increasing demand for reliable cryptographic operations for securing current systems has given birth to well-advanced and developed hardware solutions, in this paper we consider issues within the traditional symmetric advanced encryption standard (AES) cryptographic system as major challenges. Additionally, problems such as throughput limitations, reliability, and unified key management are also discussed and tackled through appropriate hierarchical transformation techniques. To overcome these challenges, this paper presents the design and field programmable gate array (FPGA)-based implementation of a cryptographic coprocessor optimized for substitution box (S-Box) operation which is considered as a key component in many cryptographic algorithms such as AES. The architecture of the co-processor proposed in this article is based on the advanced characteristics of FPGAs to accelerate the S-Box transformation, improve throughput and reduce latency compared to software implementations. We discussed carefully the design considerations along with resource utilization, speed optimization, and energy efficiency. The obtained experimental results present significant performance improvements, the FPGA-based implementation ensured higher throughput and lower execution time compared to traditional central processing unit (CPU)-based methods. We presented in this work the effectiveness of using FPGAs for the acceleration of cryptographic operations in secure applications which will therefore be a robust solution for the next generation of secure systems
An optimized simulated annealing memetic algorithm for power and wirelength minimization in VLSI circuit partitioning
Get PDFThe development of physical architecture standards for very large scale integration (VLSI) single and multichip platforms is still in its early stages. To deal with the growing complexity of modern VLSI systems, it has become common practice to split large circuit architectures into smaller, easier-to-manage sub-circuits. Circuit partitioning improves parallel modeling, testing, and system performance by lowering chip size, number of components and interconnects, wire length (WL), and delays. VLSI partitioning's primary goal is to split a circuit into smaller blocks with as few connections as possible between them. This is frequently accomplished by recursive bi-partitioning until the required complexity level is reached. Thus, partitioning is a fundamental circuit design challenge. An efficient remedy that offers a heuristic method that explores the design space to iteratively enhance outcomes is evolutionary computation. In order to minimize WL, area, and interconnections, we provide an optimized simulated annealing memetic algorithm (OSAMA) that combines local search methods with evolutionary tactics. The efficiency of the method was evaluated using criteria like runtime, cost, delay, area, and WL. OSAMA's ability for effective partitioning is demonstrated by experimental results, which confirm that it dramatically lowers important design parameters in VLSI circuits
An approximate model SpMV on FPGA assisting HLS optimizations for low power and high performance
Get PDFHigh performance computing (HPC) in embedded systems is particularly relevant with the rise of artificial intelligence (AI) and machine learning at the edge. Deep learning models require substantial computational power, and running these models on embedded systems with limited resources poses significant challenges. The energy-efficient nature of field-programmable gate arrays (FPGAs), coupled with their adaptability, positions them as compelling choices for optimizing the performance of sparse matrix-vector multiplication (SpMV), which plays a significant role in various computational tasks within these fields. This article initially did analysis to find a power and delay efficient SpMV model kernel using high level synthesis (HLS) optimizations which incorporates loop pipelining, varied memory access patterns, and data partitioning strategies, all of this exert influence on the underlying hardware architecture. After identifying the minimum resource utilization model, we propose an approximate model algorithm on SpMV kernel to reduce the execution time in Xilinx Zynq-7000 FPGA. The experimental results shows that the FPGA power consumption was reduced by 50% when compared to a previously implemented streaming dataflow engine (SDE) flow, and the proposed approximate model improved performance by 2× times compared to that of original compressed sparse row (CSR) sparse matrix
Calibration and measurement of cotton moisture using real time system with statistical analysis
Get PDFAccurate moisture measurement in cotton is essential for maintaining fibre quality, ensuring safe storage, and supporting efficient processing. Improper moisture levels can result in microbial growth, fibre degradation, or mechanical damage during ginning and spinning operations. This study presents the development of a real-time moisture measurement system for cotton used in the ginning industry. The system operates on the principle of electrical resistance change to detect varying moisture levels. Cotton samples were categorized into four types: wet, new, old, and dry. The system is designed for use on moving or in-process cotton. To evaluate system performance, linear discriminant analysis (LDA), and hierarchical clustering analysis (HCA) were employed for classification. Partial least squares (PLS) regression was used to calibrate the system against the standard oven-drying method (ASTM D2495-07). Further, artificial neural network (ANN) modelling was applied for moisture prediction. The system successfully discriminated between the cotton types, achieving over 85% explained variance in classification. ANN-based prediction aligned closely with the standard reference method. The developed system provides a low-cost, fast, and real-time solution for moisture measurement in cotton, with strong potential for industrial application
On time audio alert automated intelligent system for visually impaired people
Get PDFIndia is the home of the world’s blind population. The country has around 12 million individuals with visual impairment against a global total of 39 million according to a report published by the National Programme for Control of Blindness. Visually impaired people cannot live independently. They have to depend on others for their daily activities. The major problem occurs when blind people walk on the road, they cannot detect any obstacle which puts them at risk. sometimes it causes major injuries and accidents. With the proposed system, visually impaired people can walk on the road independently. A device with internet of things (IoT) technology where smart glass is embedded with an ultrasonic sensor, sunglasses, Raspberry Pi, voice module ISD1820, and Bluetooth. This device alerts the user with audio guidance. When people walk in front of an obstacle, the device detects the obstacle and tells the user at what distance the obstacle is there. They can walk on the road comfortably and fearlessly. It gives audio alerts about obstacles to the user. The key features are it is easy to wear, lightweight, and cost-effective. Wearing smart glasses, they can walk on the road confidently like a normal human being without any guilt
TENS device for cervical pain during teleworking controlled remotely by mobile application
Get PDFMonitoring cervical muscle pain during teleworking, exacerbated by the COVID-19 pandemic and increased remote work, highlights electrotherapy as a crucial physical therapy tool to mitigate muscle pain and promote tissue recovery, addressing ergonomic and occupational health problems that affect the well-being of remote workers. The research proposes to design a transcutaneous electrical nerve stimulation (TENS) device to monitor cervical muscle pain during teleworking, addressing the urgent need for technological solutions to mitigate this problem and improve the quality of life of teleworkers through data acquisition and processing, hardware development, implementation device monitoring, and evaluation software. For this, a TENS device was designed with a graphical interface to treat muscle pain in the neck of teachers who do remote work, dividing it into four stages: signal acquisition and generation, Bluetooth communication with an Android device, signal conditioning, and amplification and protection, following a development scheme that includes circuit design in Proteus and the creation of a mobile application in App Inventor. In conclusion, it was obtained that the power supplies have an average error of less than 1%, indicating good general performance and confirming the consistency and optimal performance of the proposed therapies
An internet of things-driven smart key system with real-time alerts: innovations in hotel security
Get PDFThis paper presents an innovative smart key system designed to enhance the safety and convenience of hotel guests. The system employs an iterative, agile approach encompassing the phases of requirement analysis, design, implementation, and testing. Key components of the input circuitry include limit switches, RFID-RC522 and SW420 vibration sensors, which collectively gather data. This data is processed using an Arduino Uno microcontroller and integrated with internet of things (IoT) technology. On the output side, the system incorporates a solenoid lock and is capable of promptly notifying users via Telegram in response to unauthorized access attempts. Importantly, the system can distinguish between vibrations caused by unauthorized entry and those from legitimate usage. Rigorous testing validates its efficacy, issuing Telegram alerts promptly when detecting security breaches. This technological advancement significantly enhances hotel room security, providing an intelligent real-time solution. The fusion of IoT, Arduino microcontroller, and precise sensor configuration underscores the system's reliability, setting new benchmarks for security in the hospitality sector. The comprehensive approach detailed in this paper offers valuable insights applicable to a wide range of security applications
Implementing a very high-speed secure hash algorithm 3 accelerator based on PCI-express
Get PDFIn this paper, a high-performance secure hash algorithm 3 (SHA-3) is proposed to handle massive amounts of data for applications such as edge computing, medical image encryption, and blockchain networks. This work not only focuses on the SHA-3 core as in previous works but also addresses the bottleneck phenomenon caused by transfer rates. Our proposed SHA-3 architecture serves as the hardware accelerator for personal computers (PC) connected via a peripheral component interconnect express (PCIe), enhancing data transfer rates between the host PC and dedicated computation components like SHA-3. Additionally, the throughput of the SHA-3 core is enhanced based on two different proposals for the KECCAK-f algorithm: re-scheduled and sub-pipelined architectures. The multiple KECCAK-f is applied to maximize data transfer throughput. Configurable buffer in/out (BIO) is introduced to support all SHA-3 modes, which is suitable for devices that handle various hashing applications. The proposed SHA-3 architectures are implemented and tested on DE10-Pro supporting Stratix 10 - 1SX280HU2F50E1VG and PCIe, achieving a throughput of up to 35.55 Gbps and 43.12 Gbps for multiple-re-scheduled-KECCAK-f-based SHA3 (MRS) and multiple-sub-pipelined-KECCAK-f-based SHA-3 (MSS), respectively