International Journal of New Practices in Management and Engineering
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Design and Analysis of Bi-planar Antenna for Long Term Evolution Base Stations
In this article, A bi-planar receiving antenna is planned for LTE convenient base stations. The proposed reception apparatus involves two parts one for the upper band and another for lower band. It can in like manner be shown without granulating folds. The lower band has the pair of printed dipoles with two or three parasitic parts for transmission limit improvement. The upper band contains a few crumbled dipoles. The microstrip line and dipole are cut on a comparative substrate. The upper band segments are wrapped in lower band segments encircling a diminished structure. The bi-planar receiving wire achieves an information transmission of around 2 GHz. The arranged receiving wire can be completed in versatile base stations. The radio wire increase achieved around ~12 dbi which is sensible for the adaptable correspondence base station structures
The b-Coloring of graphs in Bistar and Its Various Properties
A graph's b-coloring iswhenG its vertices are properly colored so that every color class has a vertex connected to at least one vertex in every other color class. In graph Gthe b – chromatic number denoted by ????(G),is the maximal integer k such that G may have a b – coloring with k- colors. In the present study, we derive the b-chromatic number for the corona product of the Bistar graph, which is represented by the following:????(Bn,n ° Pn), ???? (Bn,n ° Cn), ???? (Pn ° Bn,n), ????(Cn° Bn,n)respectively
The Gig and Sharing Economy: Transformations, Challenges, and Organisational Responses
The rise of the gig and sharing economy in the 2010s represents one of the most significant shifts in labour markets and business models since the advent of industrial capitalism. Enabled by digital platforms such as Uber, Airbnb, TaskRabbit, and Upwork, this new economy reshapes the relationship between firms, workers, and consumers. It challenges traditional understandings of employment, regulation, and value creation. This article explores the drivers of the gig and sharing economy, including technological innovation, consumer preferences, and globalisation. It then examines key challenges: worker precarity, regulatory ambiguity, market concentration, and ethical dilemmas. Strategic responses are identified for firms, policymakers, and workers, including platform governance, social protection mechanisms, and collaborative models. Sectoral case studies in transport, hospitality, freelancing, and retail provide practical insights into successes and failures. Broader implications for labour rights, taxation, and the future of work are also analysed. The central argument is that the gig and sharing economy cannot be dismissed as a passing trend; it is an enduring transformation that requires innovative governance and inclusive strategies to ensure fairness, sustainability, and legitimacy
Hybrid Hand-off Scheme for Performance Improvisation of Wireless Networks
Wireless systems administration is turning into an inexorably significant and well known method of giving worldwide data access to clients progressing. Handoff, the procedure where portable hubs select best passageway accessible to move information and its postpones make a major issue. A great deal of research has been done in most recent years to diminish the handoff delays happen in the various degrees of WLAN correspondence. Because of the versatility of handoff, significant viewpoint in WLAN and cell correspondences are substantially more significant. Because of constrained scope of APs, WLAN likewise gives adequate data transmission to continuous spilling administrations. In this research article, various handoff plans are proposed to diminish the hand-off idleness and bolster quick hand-off in IEEE 802.11arcchitecture of wireless networks. In this article, we survey these quick handoff plots subjectively. In this work it is to make accessible preparation for prospect research on lessening the handoff inertness and give accentuation on necessity of quick handover for consistent network
Monitoring of Drainage System in Urban Using Device Free Localization Neural Networks and Cloud computing
Wireless Sensor Network is a Wi-Fi community consisting of spatially propagated and self-sufficient devices using sensors to detect physical or environmental conditions. During heavy rainfall, the urban drainage system cannot drain the water. A wireless sensor with many interconnected wireless sensor nodes captures real-time data from the network environment and transmits this data to a base station for analysis and operation. With wireless sensor nodes, it is possible to capture and monitor the amount of water in drainages and the difference in water flow between the two points in the drainage system. Nevertheless, the majority localization techniques aims on device based localization, which can find target with festinated devices. It is not suitable for applications such as terrain, drainage flow and flooding. Here device free wireless localization system using artificial neural networks and a cluster based wireless sensor network system to monitor urban drainage is proposed. There are two stages in the system. During the off-line preparation stage, Acceptable Signal Strength (RSS) differential metrics are calculated between the RSS metrics together while the monitor area is empty and calculated by a specialized in the region. Some RSS dissimilarity values ??are selected in the RSS Difference Matrix. The RSS dissimilarity standards ??and associated matrix indices are taken as the inputs of the ANN representation in addition to the identified position coordinate are in its outputs. The real-time data collected from the wireless sensor network is used to detect overflow and provide alarms before disturbances arise
Analysis and Implementation of Hybrid FIR Architecture in Speech Processor
Hearing aid is an electronic gadget precisely used into the internal ear which reestablishes halfway hearing to smooth hearing. The discourse processor of CI parts the sound-related sign into groups of various frequencies and changes over them into appropriate codes for animating the cathodes in cochlea of ear. The cathode actuates sound-related nerve filaments to give hearing sensation. The expense of the CI alone goes to around 100,000 US dollars. For the efficient less well-to-do individuals with hearing sickness, it might be too exorbitant to even consider affording for this hardware to recoup from the conference misfortune. It gets important to cut down the expense. The cost decrease might be accomplished with diminished region, low force and rapid activity of the CI. This goal intuited both the simple and the computerized based CI originators to inquire about their techniques to give individuals less expensive and profoundly understandable CI. The primary objective of this paper is to develop reconfigurable DSP architectures for the filter banks in speech processor of CI with the following features like minimized area of the filter, reduced power consumption of the speech processor and enhanced presentation of the filter. This paper involves the design and hardware implementation of narrow band pass FIR filter for speech processor of CI using the Xilinx System Generator (XSG) tool on Virtex 7 FPGA
Evaluation and Examination of Aperture Oriented Antennas
The exhaustive evaluation and analysis of aperture oriented antennas for different dimensions at two different frequencies (1800 MHz and 2.4 GHz) is presented in this paper. Design and comparison of the antennas for their performance is done through MATLAB. It is inferred that the circular aperture antenna has 95% higher directivity than rectangular aperture antenna. In addition, for the circular aperture antenna HPBW is 0.2849 degrees and for rectangular aperture HPBW is 1.0143 degrees. Also, circular patch antenna has less side lobe power than that of rectangular aperture antenna
Design and Implementation of High Speed Vedic Multiplier in SPARTAN 3 FPGA Device
Digital systems which are more effective are necessary due to the enormous growth in the technology. So, we go for multipliers which are playing a key role in each and every digital domain device. Also, designing a multiplier with high speeds to perform ALU operations is an important aspect in digital signal processing. These operations are used for DFT, convolution etc. Hence, professionals in DSP domain are trying to develop innovative algorithms and hardware implementation. It is very essential to employ a multiplier which is more effective. They are many standard algorithms that are existing to reduce the area and time needed for execution. Vedic era described algorithms in vedic mathematics that supply an efficiency which are of high level. They provide 16 sutras for the operation of multiplication. Here, we discuss about urdhva tiryakbhyam algorithm for multiplication operation. Therefore, vedic algoritm provides better efficiency in comparison to that of conventional multipliers
Design and Analysis of Low Power Hybrid Braun Multiplier using Ladner Fischer Adder
Multiplier is important in many DSP systems and in many hardware blocks. Multiplier are used in various DSP application like digital filtering, digital communication. This needs parallel array multiplier to attain high speed for execution and better performance. A specific array multiplier is implemented known as Braun design. Braun multiplier is the one which is a kind of parallel multiplier. It contains different CSA count of AND gates. Braun multiplier employing Ripple Carry Adder is developed here having high speed PPA. It will reduce the delay and implemented using Tanner EDA tool
Analysis of Modified Current Controller and its Implementation in Automotive LED
A novel highly dimmable current controller which is a linear one is employed in the application of low power automotive is discussed here. Light Emitting Diode is the one which drives current that is linearly controlled to decrease the intensity of LED to limit the destruction of the LED and improve its reliability. Although many dimming techniques for LED lighting are available, our proposed method outperforms the existing methods in terms of power consumption and the no. of transistors used in the proposed design. This emits 100mA and decrease the LED current which is going linearly based on the theory of dimming control voltage. Toggling of LED is avoided finally in comparison with the existing system. This circuit is developed in 0.18?m process technology and Cadence ADE with Spectre is employed for simulation purpose. The proposed method utilizes a maximum power of 392.85 mW when the supply voltage is 4V and the control voltage is 4V at the temperature of 27oC