International Journal of Computer (IJC - Global Society of Scientific Research and Researchers, GSSRR)
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Neural Networks in Business Forecasting
Get PDFNeural Network is defined as the ability of a group to solve more problems than its individual members. The idea brings that a group of people can solve problems efficiently and offer greater insight and a better answer than any one individual could provide. The applications of Neural Network enhance an innovative business model for an enterprise. Role of Neural Network in an enterprise brings effectiveness. Further work will be carried out towards the Mathematical modeling of neural networks and various parameters will be engaged so as to get the required result to desired degree of accuracy [1]
Performance Issues on K-Mean Partitioning Clustering Algorithm
Get PDFIn data mining, cluster analysis is one of challenging field of research. Cluster analysis is called data segmentation. Clustering is process of grouping the data objects such that all objects in same group are similar and object of other group are dissimilar. In literature, many categories of cluster analysis algorithms present. Partitioning methods are one of efficient clustering methods, where data base is partition into groups in iterative relocation procedure. K-means is widely used partition method. In this paper, we presented the k-means algorithm and its mathematical calculations for each step in detailed by taking simple data sets. This will be useful for understanding performance of algorithm. We also executed k-means algorithm with same data set using data mining tool Weka Explorer. The tool displays the final cluster points, but won’t give internal steps. In our paper, we present each step calculations and results. This paper helpful to user, who wants know step by step process. We also discuss performance issues of k-means algorithm for further extension.
Optimization of Speed using Compressors
Get PDFThe main objective of this Review is to provide high speed solutions for Very Large Scale Integration (VLSI) designers. Especially, we want focuses on the reduction of the time delay, which is showing an ever-increasing growth with the scaling down of the technologies. Various techniques at the different levels of the design process have been implemented to reduce the time delay at the circuit, architectural and system level. The high performance is obtained by using a new hierarchical structure, These adders are called compressors. These compressors make the multipliers faster as compared to the conventional design .
Improving Performance of Ad Hoc On-demand Distance Vector (AODV) Routing Protocol in Wireless Sensor Network
Get PDFAd hoc On-Demand Distance Vector (AODV) is a routing protocol for mobile ad hoc networks (MANETs) and other wireless ad hoc networks. This paper attempts to modify AODV to enhance network performances on wireless sensor network (WSN). The main idea of modified AODV is using multi metrics in route decision instead of single hop count metric. The modified AODV considers energy factor and node lifetime in route decision in order to maintain the connectivity of the network as long as possible. Simulation results conducted in network simulator (NS-2) prove that the effectiveness of modified AODV in terms of throughput, average end-to-end delay, routing overhead, dropped packet ratio and energy consumption and so on. There is significant decrease in average end to end delay, control overhead and dropped packet ratio by using modified AODV protocol under the varying traffic load.
Compression on Wireless Sensor Network with Performance Guarantee
Get PDFMultimedia contains enormous amount of files it consumes more memory space, hard disk, energy and time. To overcome these problems we propose ?Robust information driven data compression architectures for wireless networks. The relationship between the values of sensors will be useful to improve the compression performance. In this, we are using two types of techniques; they are ?logical mapping algorithm and state of the distributed data compression. The cluster-based and information-driven architecture (RIDA) uses two types of transforms, discrete cosine transform and discrete wavelet transform. This architecture will reduce up to 30% of energy, 80-95% of bandwidth can be saved, and we can find the missing nodes also
Diminution of Real Power Loss by Using Hybridization of Bat Algorithm with Harmony Search Algorithm
Get PDFIn this paper, a new Hybridization of Bat algorithm with Harmony search algorithm (BAHS) is proposed for solving reactive power dispatch problem. The enhancement includes the addition of pitch modification procedure in HS serving as a mutation operator during the procedure of the bat updating with the aim of speeding up convergence, thus making the approach more feasible for a wider range of real-world applications. The proposed Hybridization of Bat algorithm with Harmony search algorithm (BAHS) algorithm has been tested on standard IEEE 30, IEEE 57 bus test systems and simulation results show clearly the superior performance of the proposed algorithm in reducing the real power loss
Dolphin Echolocation Algorithm for Solving Optimal Reactive Power Dispatch Problem
Get PDFThis paper proposes Dolphin echolocation Algorithm (DEA) for solving the multi-objective reactive power dispatch problem. Echolocation is the genetic sonar used by dolphins and more than a few kinds of other animals for direction-finding and hunting in different environments. This aptitude of dolphins is mimicked in this paper to develop a new process for solving optimal reactive power dispatch problem. A detailed study has shown that meta-heuristic algorithms have certain overriding rules. These rules will facilitate to get enhanced results. Dolphin echolocation algorithm takes reward of these rules and outperforms many active optimization methods. The new approach DEA leads to outstanding results with little computational efforts. In order to evaluate the efficiency of the proposed algorithm, it has been tested on IEEE 30 bus system and compared to other specified algorithms. Simulation results show that DEA is superior to other algorithms in tumbling the real power loss and enhancing the voltage stability.
A New charged system Search for Solving Optimal Reactive Power Dispatch Problem
Get PDFThis paper presents an algorithm for solving the multi-objective reactive power dispatch problem in a power system. Modal analysis of the system is used for static voltage stability assessment. Loss minimization and maximization of voltage stability margin are taken as the objectives. Generator terminal voltages, reactive power generation of the capacitor banks and tap changing transformer setting are taken as the optimization variables. This paper presents a new optimization algorithm based on some principles from physics and mechanics, which will be called Charged System Search (CSS). We utilize the governing Coulomb law from electrostatics and the Newtonian laws of mechanics. CSS is a multi-agent approach in which each agent is a Charged Particle (CP). CPs can affect each other based on their fitness values and their separation distances. The quantity of the resultant force is determined by using the electrostatics laws and the quality of the movement is determined using Newtonian mechanics laws. CSS can be utilized in all optimization fields; especially it is suitable for non-smooth or non-convex domains. CSS needs neither the gradient information nor the continuity of the search space. Proposed algorithm has been tested in standard IEEE 30 bus test system.
Efficient Text Compression Algorithm Based on an Existing Dictionary
Get PDFThis research article presents a new efficient lossless text compression algorithm based on an existing dictionary. The proposed algorithm represents the target texts to be compressed in a bit form, and the vocabularies are stored in the existing dictionary. Regarding to the results, the time complexity only takes O(n) time of both cases of encoding and decoding scenarios. The space complexity is O(d) bit(s) per 2d words where d=1,2,3,…The theoretical results showed bits per words and maximum spaces to be saved. These results indicated that the maximum original texts could be compressed more than 99 %
Performance Analysis and Verification of Multipliers
Get PDFMultiplication is a fundamental operation in most arithmetic computing systems. Multipliers have large area, long latency and consume considerable power. The number of gates per chip area is constantly increasing, while the gate switching energy does not decrease at the same rate, so the power dissipation rises and heat removal becomes more difficult and expensive. Then, to limit the power dissipation, alternative solutions at each level of abstraction are used. At the algorithm and architecture level, this paper addresses Low-Power, High Speed and Less Area multiplier design systematically from two aspects: internal efforts considering multiplier architectures and external efforts considering input data characteristics. For internal efforts, we consider recoding optimization for partial product generation, operand representation optimization, and structure optimization of partial product reduction. For external efforts, we consider signal gating to deactivate portions of a full-precision multiplier. Several multiplier types are studied: array multipliers, wallace multipliers, booth multiplier. In accordance to that we specify that the comparison and verification of the multiplier on basics of time delay, power and area.