72 research outputs found

    Transient response analysis in IBR-dominated power systems based on short circuit ratio

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    Inverter-based resources (IBRs) play a major role in transition to renewable energy, which poses new threats to the power grid’s stability and dependability. As convention a synchronous generators are replaced by IBR causes decrease in the inertia of the grid. As the penetration level rises, the grid’s strength decreases, making it more vulnerable to disturbances. This paper presents a dynamic performance evaluation of a grid-following inverter(GFLI) under varying grid strengths, characterized by different Short Circuit Ratios (SCRs). The inverter is designed with a constant DC voltage source, an L-filter interface, and a cascaded control structure that includes inner current control loops and outer power control (PQ) executed in the synchronous d q reference frame. The transient behavior and current tracking performance of the inverter are examined by applying a step change in active power reference from 10kW to 11 kW. The Key system responses are observed by time domain simulations. The analysis highlights the influence of grid strength on the Efficiency of the control strategy, especially in weak grid conditions. Results demonstrate that the proposed control strategy maintains stable operation and accurate power delivery under strong to moderately weak grid conditions, while performance degrades significantly under weak grid scenarios (SCR = 1)

    Design and identification of an optimal approach for modelling a hybrid renewable energy system

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    Most power generation relies on fossil fuels, which are both finite resources and major contributors to greenhouse gas emissions. In recent years, renewable energy sources such as solar, wind, and biomass have played an important role in power generation to mitigate these concerns. However, the successful modelling, operation, and integration of these sources into the grid system poses significant challenges due to their inherent variability and dependency on environmental conditions. Due to these challenges, determining the optimal capacity of renewables in a hybrid system is complex. Thus, a robust methodology is required to address this design challenge effectively. To achieve this, development of advanced modelling techniques is suggested that consider the probabilistic nature of renewable energy sources and load patterns. This study analyses different approaches, including the deterministic and probabilistic methods, and proposes an optimal approach and design for a hybrid renewable energy system, which is more reliable with a reduced loss of power supply probability and produces energy with 26.3% lower levelised cost of electricity (LCOE) than fossil fuel–based alternatives such as the utility grid. A detailed analysis of the compatibility of the proposed method with the actual real-time data is carried out, and the effect of the grid purchase and sale capacities on the LCOE of the produced energy is examined

    Density based traffic control system

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    This paper introduces a density-based traffic control system aimed at optimizing traffic management at intersections. Utilizing Arduino mega 2560, sensor technology, and an LCD display, the system dynamically adjusts signal timings in response to varying traffic densities. By incorporating infrared sensors for vehicle detection and a sound sensor to prioritize emergency vehicles, the system intelligently allocates green light durations to different roadways, minimizing congestion and ensuring smoother traffic flow. Categorizing traffic into high, moderate, and low-density scenarios enhances the system's adaptability to changing traffic conditions. Overall, this paper offers a practical solution for enhancing road safety, reducing travel times, and improving transportation efficiency in urban environments through intelligent traffic control with visual feedback provided by the LCD display

    Seamless transition between grid forming and grid following inverters based on online grid impedance estimation

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    The rapid increase in the penetration of inverterbased resources (IBRs) into the distribution network causes thepower system to behave as a weak grid and often alters system strength. IBRs operate as either grid-following (GFL) or grid forming (GFM) inverters, differing in both control stability and inertia support capabilities under varying operating conditions. To maintain system stability across different grid strengths, IBRs need to support smooth switching between GFL and GFM modes. This paper presents an automatic smooth-switching control strategy based on online grid impedance estimation to enhance operational stability. Ordinary Least Squares (OLS) regression is used to estimate grid impedance, and hysteresis switching is applied to prevent continuous switching when grid strength fluctuates near boundary conditions. The effectiveness of the proposed control strategy is verified through case studies under varying grid strengths

    Boundary analysis of damping methods for virtual synchronous generators

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    Virtual synchronous generators (VSGs) imitate traditional synchronous generators to provide virtual inertia and damping for inverter-based resources. The emulated damping relates to the power synchronization, therefore, has a major impact on system stability. Although various damping methods exist, phase-locked loop (PLL) integration is particularly concerning, as it is a key component in grid-following (GFL) control but now is being applied to grid-forming (GFM). This paper analyzes the typical VSG control and PLL damping unit by mapping stability boundaries and feasibility range. The boundaries are mapped in two dimensions to determine the relationship between the control parameters and the grid impedance. A comprehensive sensitivity analysis of controller parameters for VSG stability is conducted, drawing parallels with the equivalence of droop-based GFM stability. Finally, the boundary analysis is verified by time-domain simulation results and demonstrates the reliability of damping-switching method

    Clock multiplication techniques for high-speed I/Os

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    Generation of a low-jitter, high-frequency clock from a low-frequency reference clock using classical analog phase-locked loops (PLLs) requires a large loop filter capacitor and power hungry oscillator. Digital PLLs can help reduce area but their jitter performance is severely degraded by quantization error. In this dissertation different clock multiplication techniques have been explored that can be suitable for high-speed wireline systems. With the emphasis on ring oscillator based architecture using cascaded stages, three possible architectures are explored. First, a scrambling TDC (STDC) is presented to improve deterministic jitter (DJ) performance when used with a low-frequency reference clock. A cascaded architecture with digital multiplying delay locked loop as the first stage and hybrid analog/digital PLL as the second stage is used to achieve low random jitter in a power efficient manner. Fabricated in a 90nm CMOS process, the prototype frequency synthesizer consumes 4.76mW power from a 1.0V supply and generates 160MHz and 2.56 GHz output clocks from a 1.25MHz crystal reference frequency. The long-term absolute jitter of the 60MHz digital MDLL and 2.56 GHz digital PLL outputs are 2.4 psrms and 4.18 psrms, while the peak-to-peak jitter is 22.1 ps and 35.2 ps, respectively. The proposed frequency synthesizer occupies an active die area of 0.16mm2 and achieves power efficiency of 1.86 mW/GHz. Second, a hybrid phase/current-mode phase interpolator (HPC-PI) is presented to improve phase noise performance of ring oscillator-based fractional-N PLLs. The proposed HPC-PI alleviates the bandwidth trade-off between VCO phase noise suppression and ΔΣ quantization noise suppression. By combining the phase detection and interpolation functions into an XOR phase detector/interpolator (XOR PD-PI) block, accurate quantization error cancellation is achieved without using calibration. Use of a digital MDLL in front of the fractional-N PLL helps in alleviating the bandwidth limitation due to reference frequency and enables bandwidth extension even further. The extended bandwidth helps in suppressing the ring-VCO phase noise and lowering the in-band noise floor. Fabricated in 65nm CMOS process, the prototype generates fractional frequencies from 4.25 to 4.75 GHz, with an in-band phase noise floor of -104 dBc/Hz and 1.5 psrms integrated jitter. The clock multiplier achieves power efficiency of 2.4mW/GHz and FoM of -225.8 dB. Finally, an efficient clock generation, recovery, and distribution techniques for flexible-rate transceivers are presented. Using a fixed-frequency low-jitter clock provided by an integer-N PLL, fractional frequencies are generated/recovered locally using multi-phase fractional clock multipliers. Fabricated in a 65nm CMOS, the prototype transceiver can be programmed to operate at any rate from 3-to-10 Gb/s. At 10 Gb/s, integrated jitter of the Tx output and recovered clock is 360 fsrms and 758 fsrms, respectively.Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2019-05-01The student, Romesh Kumar Nandwana, accepted the attached license on 2017-04-17 at 15:09.The student, Romesh Kumar Nandwana, submitted this Dissertation for approval on 2017-04-17 at 15:42.This Dissertation was approved for publication on 2017-04-19 at 08:46.DSpace SAF Submission Ingestion Package generated from Vireo submission #10816 on 2017-08-10 at 15:05:48Made available in DSpace on 2017-08-10T20:32:59Z (GMT). No. of bitstreams: 3 NANDWANA-DISSERTATION-2017.pdf: 11016809 bytes, checksum: 1b5e34fe2c8986eeef6902237bb6f311 (MD5) LICENSE.txt: 4218 bytes, checksum: a246f466819d5f63b537a54ce4202fa9 (MD5) PROQUEST_LICENSE.txt: 4564 bytes, checksum: 451c495ff0b82c7566e4aac529f530bf (MD5) Previous issue date: 2017-04-19Embargo set by: Colleen Fallaw for item 102771 Lift date: 2019-08-10T21:27:21Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemU of I Only Restriction Lifted for Item 102771 on 2019-08-11T09:15:10Z

    Event-driven simulation of mixed-signal systems

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    Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2022-05-01This thesis presents a method of performing fast and accurate simulation for mixed-signal systems. The first section introduces traditional simulation methods for mixed-signal systems and their drawbacks. The second section shows a new way to perform such simulation in a fast and accurate way, using the event-driven simulation method. For illustrative purposes, a type-2 charge-pump phase-locked loop is implemented. The third section is an extension to the second one: nonlinear effect is also included in the system.The student, Yongxin Li, accepted the attached license on 2020-04-09 at 09:52.The student, Yongxin Li, submitted this Thesis for approval on 2020-04-09 at 10:02.This Thesis was approved for publication on 2020-04-10 at 10:32.DSpace SAF Submission Ingestion Package generated from Vireo submission #14947 on 2020-08-25 at 17:27:14Made available in DSpace on 2020-08-26T23:51:27Z (GMT). No. of bitstreams: 2 LI-THESIS-2020.pdf: 1185386 bytes, checksum: d685b65a5819d9d1e0cb9fabae213501 (MD5) LICENSE.txt: 4207 bytes, checksum: 61b0f213c407733c499da3713972fbce (MD5) Previous issue date: 2020-04-10Embargo set by: Seth Robbins for item 115711 Lift date: 2022-08-26T23:51:32Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 115711 Lift date: 2022-08-26T23:54:40Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 115711 Lift date: 2022-08-26T23:55:59Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 115711 Lift date: 2022-08-26T23:57:28Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 115711 Lift date: 2022-08-26T23:58:55Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemAuthor requested U of Illinois access only (OA after 2yrs) in Vireo ETD systemU of I Onl

    At the Crossroads: Multidiscipline Integration and Coordination in an EPC Contract: A Resurgence of Challenges and Strategic Improvement Opportunities

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    Master's thesis in Industrial Asset ManagementOver the years, the faculty of Project management contributed excellent methodologies through a set of constituted guidelines that are applicable for smooth execution of projects in every industry. They are broadly based on initiating, planning, organizing, executing, and monitoring & controlling the process groups as a single entity. The implementation of project management methodologies is carried out through project management knowledge in specialized areas such as integration, scope, time, cost, quality, human resource, communications and risk. Projects are governed by factors that have major influence in directing the success or failures. Broadly cost, time & quality have been identified as key important success factors for projects. However, the factors are also governed by the complexity of projects and risk involved in project execution. Over the decades the EPC contractors are trying to find solutions to cope up to the complexities colligated with significant risks in project execution. Extensive research is done by every contractor with an objective to integrate schedule and time management functions in an EPC project. Many scholars and researchers used different methodologies such as utility theory, scheduling milestones, cost milestones, performance index, cost accounting etc. However, the focus has been primarily on the construction phase of the project and most often ignores the fact that success delivery of a project is a synchronous and integrated effort of all the disciplines involved in project execution. This research is carried out to identify the critical success factors in EPC projects and establish the essential factors requisite for efficient execution. In a quest to define a framework that essentially facilitates identifying the critical success factors and their key influencing factors, a systematic investigation of established facts were used. The journey in search of knowledge through previously established researches and scholarly work culminated into the design and development of a framework methodology congenial to the current research environment. Collaboration with the research unit specialist groups and individuals helped to develop a survey questionnaire. The required data was acquired from selected participants of the EPC contractor organization that is specialized in offering EPC services in the oil & gas industry. The data was collected based on convenience statistical sampling technique. Acquired data was analyzed through univariate, bivariate, multivariate statistical techniques and identified the critical factors that require attention of the management of the organization under research. The findings indicated concurrence of established project success factors i.e. scope, time and cost with critical success factors identified and defined in the research. The results of analysis identified factors that are significantly affecting the efficiency of multidiscipline integration and co-ordination. The research established that an integrated control system is necessary to the management as a tool that investigates and provides answers from the project stakeholders. Such a system provides the reflection of the factors that are directly or indirectly impacting the cost, schedule and quality constraints of a project. Research Faculty Supervisor: Professor. Jayantha.P. Liyanage, Ph.D, Professor & Chair, Centre for Industrial Asset Management (CIAM), Faculty of Science & Technology, University of Stavanger Research External Supervisors: Nils Erik Olsen and Eivind Eliassen Researcher and Author: Pavan Kumar Akella M.Sc Student, Faculty of Science & Technology, University of Stavange

    RC relaxational oscillator with high supply rejection

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    A low power RC relaxation oscillator with very low voltage and temperature sensitivities is presented. Supply sensitivity is reduced by using a self-regulation loop that biases the oscillator near its zero-voltage coefficient point. Fabricated in a 65nm CMOS process, the prototype 1.5MHz oscillator consumes 6μW from 1V supply and achieves better than ±50ppm/ ̊C and ±1500ppm/V temperature and voltage sensitivities, respectively.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2020-05-01The student, Tianyu Wang, accepted the attached license on 2018-04-25 at 16:33.The student, Tianyu Wang, submitted this Thesis for approval on 2018-04-25 at 16:37.This Thesis was approved for publication on 2018-04-26 at 08:25.DSpace SAF Submission Ingestion Package generated from Vireo submission #12497 on 2018-08-31 at 17:30:30Made available in DSpace on 2018-09-04T20:47:31Z (GMT). No. of bitstreams: 2 WANG-THESIS-2018.pdf: 1064625 bytes, checksum: 8253049aced9902739dce149c03027dd (MD5) LICENSE.txt: 4208 bytes, checksum: 00472e835a2d885ea9f13444998dcbe4 (MD5) Previous issue date: 2018-04-26Embargo set by: Seth Robbins for item 107462 Lift date: 2020-09-04T20:47:38Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 107462 Lift date: 2020-09-04T20:50:11Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemLimited Restriction Lifted for Item 107462 on 2020-09-05T09:15:13Z

    Clock distribution network techniques

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    Clock distribution networks are essential to synchronous systems. The design of these networks affects the system performance dramatically and sometimes determines whether the chip can function properly or not. This thesis first describes in detail how a synchronous system works. Based on the design metrics such as the clock skew requirement and power requirement, different clock distribution network topologies are then presented, including the popular H tree, grid and serpentine structures. Finally, commonly used techniques for improving clock skew, jitter and power are discussed and conclusions are offered.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2022-08-01The student, Shuang Chen, accepted the attached license on 2020-06-26 at 16:40.The student, Shuang Chen, submitted this Thesis for approval on 2020-06-26 at 16:50.This Thesis was approved for publication on 2020-06-29 at 15:08.DSpace SAF Submission Ingestion Package generated from Vireo submission #15473 on 2020-10-02 at 15:49:41Made available in DSpace on 2020-10-07T22:48:09Z (GMT). No. of bitstreams: 2 CHEN-THESIS-2020.pdf: 770570 bytes, checksum: 068cedd8d6fc58470b4144a4e4835913 (MD5) LICENSE.txt: 4208 bytes, checksum: 65a24e6badad337f0b898ca1b859ce1f (MD5) Previous issue date: 2020-06-29Embargo set by: Seth Robbins for item 116297 Lift date: 2022-10-07T22:48:14Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Seth Robbins for item 116297 Lift date: 2022-10-07T22:50:13Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemAuthor requested closed access (OA after 2yrs) in Vireo ETD systemLimite
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