128 research outputs found
Upgrading the ATLAS Level-1 Calorimeter Trigger using Topological Information
No full textThe ATLAS Level-1 Calorimeter Trigger (L1Calo) is a fixed latency, hardware-based pipelined system designed for operation at the LHC design luminosity of 10^34cm-2s-1. Plans for a several-fold luminosity upgrade will necessitate a complete replacement for L1Calo (Phase II). But backgrounds at or near design luminosity may also require incremental upgrades to the current L1Calo system (Phase I). This paper describes a proposed upgrade to the existing L1Calo to add topological algorithm capabilities, using Region of Interest (RoI) information currently produced by the Jet and EM/Hadron algorithm processors but not used in the Level-1 real-time data path
LHCb vertex detector electronics timing and synchronization
No full textSynchronization of the electronics is the key issue at LHC with the short-bunch crossing period, the very high trigger rate and the large number of detector channels. The vertex detector signals from 200 K channels have to be sampled optimally. The consistency of the event data fragments from all detector channels must be guaranteed during data flow in the front-end and off-detector electronics and the data acquisition system. The ongoing activity in the LHCb vertex detector is described. The necessary synchronization hardware and procedure to detect synchronization errors and to recover with a minimum data losses are presented. (6 refs)
Vertex detector electronics : L1 electronics system issues
No full textThis note describes the application of general requirements to LHCb L1 front-end electronics [1] to the vertex detector L1 electronics, mainly system aspects like initialisation, resets, event identification, data formats and throttling
The Phase-I upgrade of the ATLAS Level-1 calorimeter trigger
No full textThe ATLAS Level-1 calorimeter trigger (L1Calo) is a hardware-based system that identifies events containing calorimeter-based physics objects, including electrons, photons, taus, jets, and missing transverse energy. In preparation for Run 3, when the LHC will run at higher energy and instantaneous luminosity, L1Calo is currently implementing a significant programme of planned upgrades. The existing hardware will be replaced by a new system of feature extractor (FEX) modules, which will process finer-granularity information from the calorimeters and execute more sophisticated algorithms to identify physics objects; these upgrades will permit better performance in a challenging high-luminosity and high-pileup environment
Vertex Detector Electronics : ODE pre-prototype
No full textThis document is a user manual for the ODE pre-prototype module (ODEPP, also frequently referred as Read-out Board number 2, RB2). The module is under development and new features are implemented in every new version
Vertex detector electronics-timing and synchronisation issues
No full textThis paper discusses timing and synchronisaton that must occur between the front-end electronics (FEE) and the off-detector electronics (ODE) in the vertex detector (VD). Most ofthe concepts and ideas expressed in this paper can be applied , with minor changes, tosub-detectors other than VD.
Vertex detector electronics-L1 electronics prototyping
No full text98-069 Abstract This paper discusses a proposal for the prototyping of the vertex detector Off-Detector Electronics (ODE or L-1 electronics)
LHCb level-1 vertex topology trigger
No full text99-031 LHCb Level-1 Vertex Topology Trigger This document specifies the functional and technical requirements of the level-1 vertex trigger. It tries to do this without specifying details of its implementation. The level-1vertex trigger has also to interface with various components developed by other LHCb collaborators. The definition of requirements for these external interfaces is essential to particularize their task and to ensure interoperability. In order to resolve ambiguities and uncertainties of the external interfaces an implementation of them is added to the requirements. Many of the system parameters are not final. For example the geometry of the vertex detectors themselves are being discussed to be modified. Therefore all requirements are justified with respect to the driving input parameters, which shall allow to immediately identify the impact of a given change
Application of the scalable coherent interface to data acquisition at LHC: RD24 status report
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