1,721,032 research outputs found
A Reconfigurable SOM Hardware Accelerator
Porrmann M, Franzmeier M, Kalte H, Witkowski U, Rückert U. A Reconfigurable SOM Hardware Accelerator.A dynamically reconfigurable hardware accelerator for self-organizing
feature maps is presented. The system is based on the universal rapid prototyping system RAPTOR2000 that has been developed by the authors. The modular prototyping system is based on XILINX FPGAs and is capable of emulating hardware implementations with a complexity of more than 24 million system
gates. RAPTOR2000 is linked to its host – a standard personal computer or
workstation – via the PCI bus. For the simulation of self-organizing maps a module has been designed for the RAPTOR2000 system, that embodies an FPGA of the Xilinx Virtex series and optionally up to 128 MBytes of SDRAM. A speedup of about 50 is achieved with five FPGA modules on the RAPTOR2000 system compared to a software implementation on a state of the art personal computer for typical applications of self-organizing maps
Lernfähige, selbsteinstellende Antriebsregelung mit Hilfe neuronaler Hardware
Grotstollen H, Schütte F, Rückert U, Witkowski U. Lernfähige, selbsteinstellende Antriebsregelung mit Hilfe neuronaler Hardware. Projekt GR 948/14 im DFG Programm: Systemintegration elektrischer Antrieb.; 1999
Pattern synchronization for associative memory in pulse coded neural networks
Witkowski U, Rückert U. Pattern synchronization for associative memory in pulse coded neural networks. In: Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on. Vol 2. IEEE; 2004: II-381-II-384.For image processing a lot of algorithms have been
developed in the past that are well suited for specific tasks. These
algorithms are often optimized for high performance computers
with high power consumption, thus, it is not possible to use these
algorithms for mobile applications. In this paper, a massive parallel
vision system is partly discussed which is biologically inspired
and requires less power. This system consists of several layers of
pulsed neural networks, e.g. some layers form specific features
detectors to decompose the input image in several features. The
features are completed or bound by an associative memory that
needs a synchronized input pulse pattern. In this paper, we focus
on the synchronization stage of the system that is combined with
the associative memory. The discussed synchronization unit detects
correlated pulses in the network, collects them and activates
a synchrones output pattern
Low-cost Bluetooth Communication for the Autonomous Mobile Minirobot Khepera
Grosseschallau M, Witkowski U, Rückert U. Low-cost Bluetooth Communication for the Autonomous Mobile Minirobot Khepera. In: Robotics and Automation, 2005. ICRA 2005. Proceedings of the 2005 IEEE International Conference on. IEEE; 2005: 4194-4199.This paper presents a low-cost Bluetooth communication
for autonomous mobile minirobots. The interfacing
of the Bluetooth hardware is done by a simple UART
connection, which makes the approach easily portable. Using
ASCII commands and events, which are exchanged over
this serial link, the Bluetooth operations can be controlled
and monitored. Since internal Bluetooth stack operations are
concealed, no deeper knowledge of the Bluetooth technology
is necessary to utilize this wireless communication. These
features make the presented approach perfectly suited for
the integration into minirobots like the Khepera, where
computational power and spatial resources are strictly limited
Digital hardware realization of a hyper basis function network for on-line learning
Witkowski U, Neumann T, Rückert U. Digital hardware realization of a hyper basis function network for on-line learning. In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc; 1999: 205-211.The proposed paper describes a digital neural network hardware realization performing a hyper basis function network for function approximation. Both, learning and recall of the network are implemented in hardware to achieve a high performance network calculation. This opens the use of the function approximator to applications with real-time learning requirements for on-line learning. The presented hardware uses a flexible network structure, i.e. the number of basis functions is not fixed in advance, but they are integrated into the network during learning depending on the learning data set. Thus, we have a good approximation result by using a minimal number of basis function
Implementation of artificial neural networks on a reconfigurable hardware accelerator
Porrmann M, Witkowski U, Kalte H, Rückert U. Implementation of artificial neural networks on a reconfigurable hardware accelerator. In: Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on. IEEE Comput. Soc; 2002: 243-250.The hardware implementation of three different artificial
neural networks is presented. The basis for the implementation
is the reconfigurable hardware accelerator
RAPTOR2000, which is based on FPGAs. The investigated
neural network architectures are neural associative
memories, self-organizing feature maps and basis function
networks. Some of the key implementational issues are
considered. Especially resource-efficiency and performance
of the presented realizations are discussed
A Bluetooth Scatternet for the Khepera Robot
Du JL, Witkowski U, Rückert U. A Bluetooth Scatternet for the Khepera Robot. In: 4th International Symposium on Autonomous Minirobots for Research and Edutainment (AMiRE). Buenos Aires, Argentina; 2007: 189-195.Radio-based communication plays a vital role in multi-robot systems.
Bluetooth is an energy-efficient communication technology suited for resourcelimited mini-robots such as the Khepera. However, the maximum number of nodes in a Bluetooth piconet is limited, while scatternets - networks of piconets - have not been fully specified. In this paper we present a Bluetooth scatternet using Bluetooth communication sticks developed in our research group. In our solution, bridge nodes carrying two of such Bluetooth sticks are used to interconnect piconets. Beside the developed hardware, issues such as routing as well as topology control are addressed. Finally, data rate and latency measurements are presented for the implemented solution
Going Beyond Counting First Authors in Author Co-citation Analysis
The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Implementing Neural Soft- And Hardware On The Autonomous Mini-robot Khepera
Loffler A, Klahold J, Heittmann A, Witkowski U, Rückert U. Implementing Neural Soft- And Hardware On The Autonomous Mini-robot Khepera. In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc; 1999: 425-426.The applicability of neural networks to generate complex behaviour on autonomous systems is demonstrated both at soft- and hardware-level. In particular, the emergence of simple behaviors based on the Braitenberg approach, adaptive sensor calibration by self-organizing maps with a comparison between off- and online learning and a visualisation tool for a posteriori analysis are shown. It is also envisaged to present the working of embedded neural hardware as associative memory and self-organizing maps. In this connection, the mini-robot Khepera serves as an exemplary platfor
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