12 research outputs found
HyperFPGA: SoC-FPGA Cluster Architecture for Supercomputing and Scientific applications
No full textSince their inception, supercomputers have addressed problems that far exceed those of a single computing device.
Modern supercomputers are made up of tens of thousands of CPUs and GPUs in racks that are interconnected via elaborate and most of the time ad hoc networks.
These large facilities provide scientists with unprecedented and ever-growing computing power capable of tackling more complex and larger problems.
In recent years, the most powerful supercomputers have already reached megawatt power consumption levels, an important issue that challenges sustainability and shows the impossibility of maintaining this trend.
With more pressure on energy efficiency, an alternative to traditional architectures is needed.
Reconfigurable hardware, such as FPGAs, has repeatedly been shown to offer substantial advantages over the traditional supercomputing approach with respect to performance and power consumption.
In fact, several works that advanced the field of heterogeneous supercomputing using FPGAs are described in this thesis \cite{survey-2002}.
Each cluster and its architectural characteristics can be studied from three interconnected domains: network, hardware, and software tools, resulting in intertwined challenges that designers must take into account.
The classification and study of the architectures illustrate the trade-offs of the solutions and help identify open problems and research lines, which in turn served as inspiration and background for the HyperFPGA.
In this thesis, the HyperFPGA cluster is presented as a way to build scalable SoC-FPGA platforms to explore new architectures for improved performance and energy efficiency in high-performance computing, focusing on flexibility and openness.
The HyperFPGA is a modular platform based on a SoM that includes power monitoring tools with high-speed general-purpose interconnects to offer a great level of flexibility and introspection.
By exploiting the reconfigurability and programmability offered by the HyperFPGA infrastructure, which combines FPGAs and CPUs, with high-speed general-purpose connectors, novel computing paradigms can be implemented.
A custom Linux OS and drivers, along with a custom script for hardware definition, provide a uniform interface from application to platform for a programmable framework that integrates existing tools.
The development environment is demonstrated using the N-Queens problem, which is a classic benchmark for evaluating the performance of parallel computing systems.
Overall, the results of the HyperFPGA using the N-Queens problem highlight the platform's ability to handle computationally intensive tasks and demonstrate its suitability for its use in supercomputing experiments.Since their inception, supercomputers have addressed problems that far exceed those of a single computing device.
Modern supercomputers are made up of tens of thousands of CPUs and GPUs in racks that are interconnected via elaborate and most of the time ad hoc networks.
These large facilities provide scientists with unprecedented and ever-growing computing power capable of tackling more complex and larger problems.
In recent years, the most powerful supercomputers have already reached megawatt power consumption levels, an important issue that challenges sustainability and shows the impossibility of maintaining this trend.
With more pressure on energy efficiency, an alternative to traditional architectures is needed.
Reconfigurable hardware, such as FPGAs, has repeatedly been shown to offer substantial advantages over the traditional supercomputing approach with respect to performance and power consumption.
In fact, several works that advanced the field of heterogeneous supercomputing using FPGAs are described in this thesis \cite{survey-2002}.
Each cluster and its architectural characteristics can be studied from three interconnected domains: network, hardware, and software tools, resulting in intertwined challenges that designers must take into account.
The classification and study of the architectures illustrate the trade-offs of the solutions and help identify open problems and research lines, which in turn served as inspiration and background for the HyperFPGA.
In this thesis, the HyperFPGA cluster is presented as a way to build scalable SoC-FPGA platforms to explore new architectures for improved performance and energy efficiency in high-performance computing, focusing on flexibility and openness.
The HyperFPGA is a modular platform based on a SoM that includes power monitoring tools with high-speed general-purpose interconnects to offer a great level of flexibility and introspection.
By exploiting the reconfigurability and programmability offered by the HyperFPGA infrastructure, which combines FPGAs and CPUs, with high-speed general-purpose connectors, novel computing paradigms can be implemented.
A custom Linux OS and drivers, along with a custom script for hardware definition, provide a uniform interface from application to platform for a programmable framework that integrates existing tools.
The development environment is demonstrated using the N-Queens problem, which is a classic benchmark for evaluating the performance of parallel computing systems.
Overall, the results of the HyperFPGA using the N-Queens problem highlight the platform's ability to handle computationally intensive tasks and demonstrate its suitability for its use in supercomputing experiments
A Survey on FPGA-Based Heterogeneous Clusters Architectures
No full textIn recent years, the most powerful supercomputers have already reached megawatt power consumption levels, an important issue that challenges sustainability and shows the impossibility of maintaining this trend. To this date, the prevalent approach to supercomputing is dominated by CPUs and GPUs. Given their fixed architectures with generic instruction sets, they have been favored with lots of tools and mature workflows which led to mass adoption and further growth. However, reconfigurable hardware such as FPGAs has repeatedly proven that it offers substantial advantages over this supercomputing approach concerning performance and power consumption. In this survey, we review the most relevant works that advanced the field of heterogeneous supercomputing using FPGAs focusing on their architectural characteristics. Each work was divided into three main parts: network, hardware, and software tools. All implementations face challenges that involve all three parts. These dependencies result in compromises that designers must take into account. The advantages and limitations of each approach are discussed and compared in detail. The classification and study of the architectures illustrate the trade-offs of the solutions and help identify open problems and research lines
A Method for Accurate and Precise Pulse Arrival Time Estimation: A Case Study on High-Energy Particle Detectors
No full textAdvancements in modern electronics have enabled the sampling of signals with higher resolution, facilitating the application of new techniques for the determination of pulse arrival times at detectors. In this article, we introduce a method for accurate and precise pulse arrival time estimation. This method is immune to offset and slow background variations and pulse pile-up effects, requiring a single parameter. The validation is performed through simulations and systematic comparisons with traditional methods using synthetic pulses and experimental data collected from a particle physics detector. The presented results demonstrated superior accuracy and precision of the proposed method compared to widely used constant fraction discrimination and leading-edge discrimination methods. Moreover, this method is suitable for hardware implementation and can be applied to a wide range of pulse types across various experimental contexts, making it a versatile tool for arrival time estimation in diverse applications
Physical implementation of asynchronous cellular automata networks: mathematical models and preliminary experimental results
No full textPhysical implementation of asynchronous cellular automata networks has shown stably random oscillations under certain conditions. We present two simple mathematical models to describe transient and stationary regimes. The models are based on simple assumptions taking into account several aspects such as number of inputs of the cellular automata, rule balance, and technological frequency limitation. Numerical simulations reveal the possibility of chaotic dynamics of the average transition rate of the cellular automata in a stationary regime. With physical implementations on FPGA (field programmable gate array), preliminary experimental results show very good qualitative agreement with model’s prediction and numerical simulations. Several networks of interconnected 5-input asynchronous cellular automata have been successfully implemented in different FPGA devices, and we present some preliminary experimental results. This work aims at finding fundamental mechanisms of randomness such that the collective behavior of the cellular automata system does not depend on physical implementation details
Data Analysis and Filter Optimization for Pulse-Amplitude Measurement: A Case Study on High-Resolution X-ray Spectroscopy
No full textIn this study, we present a procedure to optimize a set of finite impulse response filter (FIR) coefficients for digital pulse-amplitude measurement. Such an optimized filter is designed using an adapted digital penalized least mean square (DPLMS) method. The effectiveness of the procedure is demonstrated using a dataset from a case study on high-resolution X-ray spectroscopy based on single-photon detection and energy measurements. The energy resolutions of the K [Formula: see text] and K [Formula: see text] lines of the Manganese energy spectrum have been improved by approximately [Formula: see text] , compared to the reference values obtained by fitting individual photon pulses with the corresponding mathematical model
Multichannel Time Synchronization Based on PTP through a High Voltage Isolation Buffer Network Interface for Thick-GEM Detectors
No full textData logging and complex algorithm implementations acting on multichannel systems with independent devices require the use of time synchronization. In the case of Gas Electron Multipliers (GEM) and Thick-GEM (THGEM) detectors, the biasing potential can be generated at the detector level via DC to DC converters operating at floating voltage. In this case, high voltage isolation buffers may be used to allow communication between the different channels. However, their use add non-negligible delays in the transmission channel, complicating the synchronization. Implementation of a simplified precise time protocol is presented for handling the synchronization on the Field Programmable Gate Array (FPGA) side of a Xilinx SoC Zynq ZC7Z030. The synchronization is done through a high voltage isolated bidirectional network interface built on a custom board attached to a commercial CIAA_ACC carrier. The results of the synchronization are shown through oscilloscope captures measuring the time drift over long periods of time, achieving synchronization in the order of nanoseconds
Diagnostic Analytics for Pixelated Particle Detectors: A Case Study
No full textWe present a method for diagnostics analysis for pixelated particle detectors. The method is based on extracting information from the detector in the form of model parameters by using a representative mathematical model. To illustrate the procedure we analyzed real experimental data obtained with the electromagnetic calorimeter ECAL2 of the COMPASS experiment at CERN. Having observed the data, the typical pulses were fitted with a mathematical model. Heat maps were drawn to visualize the distribution of the mean values of each of the fitted parameters. This data visualization technique is useful for highlighting areas with similar behavior and detecting abnormal responses in single cells. © 2023, The Author(s), under exclusive license to Springer Nature Switzerland A
Remote Laboratory for E-Learning of Systems on Chip and Their Applications to Nuclear and Scientific Instrumentation
No full textConfiguring and setting up a remote access laboratory for an advanced online school on fully programmable System-on-Chip (SoC) proved to be an outstanding challenge. The school, jointly organized by the International Centre for Theoretical Physics (ICTP) and the International Atomic Energy Agency (IAEA), focused on SoC and its applications to nuclear and scientific instrumentation and was mainly addressed to physicists, computer scientists and engineers from developing countries. The use of e-learning tools, which some of them adopted and others developed, allowed the school participants to directly access both integrated development environment software and programmable SoC platforms. This facilitated the follow-up of all proposed exercises and the final project. During the four weeks of the training activity, we faced and overcame different technology and communication challenges, whose solutions we describe in detail together with dedicated tools and design methodology. We finally present a summary of the gained experience and an assessment of the results we achieved, addressed to those who foresee to organize similar initiatives using e-learning for advanced training with remote access to SoC platforms
Corrections to “A Survey on FPGA-Based Heterogeneous Clusters Architectures”
No full textIn the above article [1], two references were missing [2], [3]
The high voltage system of the novel MPGD-based photon detectors of COMPASS RICH-1 and its development towards a scalable High Voltage Power Supply System for MPGDs
No full textThe COMPASS RICH-1 detector has undergone a major upgrade in 2016 with the installation of four novel MPGD-based photon detectors. They consist of large-size hybrid MPGDs with multi-layer architecture composed of two layers of Thick-GEMs and bulk resistive MicroMegas. A dedicated high voltage power supply system, based on CAEN HV modules, has been built and put in operation: it controls more than 100 HV channels. The system is required to protect the detectors against errors by the operator, monitor voltages and currents at a 1 Hz rate and automatically react to detector misbehavior. It includes also a HV compensation system against environmental pressure and temperature variation to grant the detector stability. The operation of a MPGD based single photon detector poses challenging requirements to the high voltage power supply systems employed in terms of high-resolution diagnostic features and dynamic voltage control. Systems satisfying all the needed features are not commercially available; for this reason a novel single channel high voltage system matching the MPGD needs has been designed and realized. In this article the COMPASS RICH-1 MPGD HV system implementation is described as well as its performance in terms of stability of the novel MPGD-based photon detectors during the physics data taking at COMPASS. The design, implementation and performance of a novel HV power supply system based on DC to DC converters and controlled by a FPGA device is presented. The capabilities of the first prototype of the new single HV channel power supply are illustrated when operated with a MPGD based single photon detector during a test beam exercise. The preliminary result of the multi channel system are briefly discussed
