1,526 research outputs found
Lateral Nonuniformity Effects of Border Traps on the Characteristics of Metal–Oxide–Semiconductor Field-Effect Transistors Subjected to High-Field Stresses
No full textConsultation Psychiatry at the National Taiwan University Hospital:1. A Review of the Cases Referred for Psychiatric Consultation.
No full textComparison of Lateral Non-uniformity Phenomena between HfO2 and SiO2 from Magnified C-V Curves in Inversion Region
No full textComprehensive study on the deep depletion capacitance-voltage behavior for metal-oxide-semiconductor capacitor with ultrathin oxides
No full textGPU Computing Gems Emerald Edition
No full text".the perfect companion to Programming Massively Parallel Processors by Hwu & Kirk." -Nicolas Pinto, Research Scientist at Harvard & MIT, NVIDIA Fellow 2009-2010 Graphics processing units (GPUs) can do much more than render graphics. Scientists and researchers increasingly look to GPUs to improve the efficiency and performance of computationally-intensive experiments across a range of disciplines. GPU Computing Gems: Emerald Edition brings their techniques to you, showcasing GPU-based solutions including: Black hole simulations with CUDA GPU-accelerated computation and interactive display o
Toward performance portability for CPUS and GPUS through algorithmic compositions
No full textThis Dissertation was approved for publication on 2017-07-05 at 16:09.DSpace SAF Submission Ingestion Package generated from Vireo submission #11312 on 2017-09-29 at 11:27:52Made available in DSpace on 2017-09-29T17:56:23Z (GMT). No. of bitstreams: 4
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Previous issue date: 2017-07-05The diversity of microarchitecture designs in heterogeneous computing systems allows programs to achieve high performance and energy efficiency, but results in substantial software redevelopment cost for each type or generation of hardware. To mitigate this cost, a performance portable programming system is required.
This work presents my solution to the performance portability problem. I argue that a new language is required for replacing the current practices of programming systems to achieve practical performance portability. To support my argument, I first demonstrate the limited performance portability of the current practices by showing quantitative and qualitative evidences. I identify the main limiting issues of conventional programming languages. To overcome the issues, I propose a new modular, composition-based programming language that can effectively express an algorithmic design space with functional polymorphism, and a compiler that can effectively explore the design space and facilitate many high-level optimization techniques. This proposed approach achieves no less than 70% of the performance of highly optimized vendor libraries such as Intel MKL and NVIDIA CUBLAS/CUSPARSE on an Intel i7-3820 Sandy Bridge CPU, an NVIDIA C2050 Fermi GPU, and an NVIDIA K20c Kepler GPU.Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2017-09-29 without embargo termsThe student, Li-Wen Chang, accepted the attached license on 2017-07-05 at 13:48.The student, Li-Wen Chang, submitted this Dissertation for approval on 2017-07-05 at 14:09
Analysis and design of massively parallel channel estimation algorithms on graphic cards
No full textThe necessity of accurate channel estimation for coherent multiuser detectors is well known. Indeed they are based on the assumption that signals are perfectly estimated, and this is never completely achieved in practice. Furthermore, practical transmitters and receivers are affected by many non-idealities like strong phase noise, and thus the task of channel estimation is all the more challenging. Another notorious issue is the high computational complexity of multiuser techniques. This project has devoted significant attention for massively parallel receiver architectures and the possibility to parallelize channel estimation algorithms. Nvidia CUDA graphic cards are especially well-suited to address problems that can be expressed as data parallel computations. This task is very challenging and ambitious, since the usage of such cards for receiver design is still at its infant stage.
This thesis describes the work carried out at German Aerospace Center (DLR) where a real-world multiuser detector is studied. The desired goals were the following: fine tuning of the already existing channel estimation algorithm; exploration of the factor graph approach in order to improve the estimation quality and to develop algorithms suitable to be parallelized; parallel implementation of the algorithms on CUDA graphic card.
All these points have been covered. Two different improvements for the already implemented phase estimator are proposed. Both are based on the same approximation of the Wiener-Levy phase model and assume the same knowledge at the receiver.
By adopting the factor graph approach, we present two existing algorithms for the phase estimation in a new parallel fashion and we show that, at the same time, they improve the estimation quality, and they are suitable to be parallelized on the board.
The performance improvement for all estimators proposed in terms of Mean Square Error are validated through several simulation campaigns carried out in different scenarios, most of them characterized by strong phase noise and low signal-to-noise ratios. Finally we present several parallel phase estimation algorithms working on CUDA graphic card and we show that, in some cases, we are in presence of a massive parallelization in which is achieved a speedup more than 200 times compared to the serial implementation. The results obtained represent a starting point for the implementation of a Parallel Iterative Receiver to be inserted in the existing multiuser detector and completely executed on CUDA graphic car
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