1,720,996 research outputs found
Defect spectroscopy and engineering for nanoscale electron device applications: A novel simulation-based methodology
In this work we present a novel simulation-based methodology for the defect spectroscopy in dielectric materials. The cross-correlated simulation of electrical characteristics (IV, CV, GV, BTI, charge pumping and noise) is exploited to profile the properties and energy-space distribution of the defects within the oxide bandgap. This novel defect spectroscopy technique will be applied to three case studies, i.e. Si- MOSFET gate stack optimization with either Si and beyond Si channel (InGaAs), and STO MIM DRAM capacitor scaling. The integration of these methods into the process optimization will lead to a strong reduction of the time/cost required for the development of novel device architectures
A simulation framework for modeling charge transport and degradation in high-k stacks
In this paper we present a comprehensive physical model that describes charge transport and degradation phenomena in high-k stacks. The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assisted contribution), power dissipation and temperature increase, defect generation, and ion and vacancy diffusion and recombination. The physical properties of defects, which play a crucial role in determining the electrical behavior of the high-k stacks, depend on their atomistic configurations, as calculated using ab-initio methods. This simulation framework represents a powerful tool to interpret electrical characterization measurements. In addition, it can be used to optimize logic and memory device stacks thanks to its predictive statistical capabilities that allow reproducing gate current, threshold voltage increase and time to breakdown (TDDB) statistics. Simulation results performed using this simulation package are shown to reproduce accurately leakage current, Stress-Induced Leakage Current (SILC), threshold voltage shift observed during Positive Bias Temperature Instability (PBTI) stress, TDDB in various dielectric stacks
A New Physical Method Based on CV--GV Simulations for the Characterization of the Interfacial and Bulk Defect Density in High-k/III--V MOSFETs
We propose a new defect characterization technique for high-k dielectric stacks in III-V MOSFETs. This technique allows extracting the defect density from the simulations of the C-V and G-V characteristics at different frequencies. The simulation is performed using a physical distributed compact model, where the trap-assisted capture and emission processes are described in the framework of the multiphonon trap-assisted tunneling theory, including lattice relaxation. The technique, tested on InGaAs MOS devices with different gate-stacks, allows profiling the interfacial and bulk defects in the (E, z) domain. The extracted map, consistent with previous report, allows reproducing C-V and G-V curves on the whole frequency and gate voltage ranges and monitoring the quality of dielectric stacks for the optimization of the manufacturing process
Microscopic Modeling of HfOx RRAM Operations: From Forming to Switching
We propose a model describing the operations of hafnium oxide-based resistive random access memory (RRAM) devices at the microscopic level. Charge carrier and ion transport are self-consistently described starting from the leakage current in pristine HfO2. Material structural modifications occurring during the RRAM operations, such as conductive filament (CF) creation and disruption, are accounted for. The model describes the complex processes leading to a formation of the CF and its dependence on both electrical conditions (e.g., current compliance, voltage stress, and temperature) and device characteristics (e.g., electrodes material and dielectric thickness)
Microscopic Modeling of Electrical Stress -Induced Breakdown in Poly-Crystalline Hafnium Oxide Dielectrics
We present a quantitative physical model describing degradation of poly-crystalline HfO2 dielectrics subjected to electrical stress culminating in the dielectric breakdown (BD). The model accounts for the morphology of the hafnium oxide film and considers the interaction of the injected electrons with the atomic defects supporting the charge transport to calculate the 3D power dissipation and temperature maps across the dielectric. This temperature map, along with that of the electric field, is used to self-consistently calculate the stress-induced defect generation rates in the dielectric during stress. The model quantitatively reproduces the evolution of the currents measured on HfO2 MIM capacitors during constant voltage stress, up to the onset of BD, and the dependencies of the time-dependent dielectric breakdown (TDDB) distributions on stress temperature and voltage. It represents a powerful tool for statistical reliability predictions that can be extended to other high-k materials, multilayer stacks and resistive RAM devices based on transition metal oxides
Electrical defect spectroscopy and reliability prediction through a novel simulation-based methodology
The semiconductor technology development requires a full understanding of material implications at the device level. This requires connecting the microscopic/atomic properties of the material (e.g. defect) to the macroscopic electrical characteristics of the device. In this scenario, we developed a new methodology, supported by a multi-scale modeling and simulation (MS) software [1], [2], which allows extracting from the simulations of the electrical characterization measurements (I-V, C-V, G-V, BTI, Charge-Pumping, noise, stress) the material and device properties that can be used for the technology development, the design of novel devices and the analysis of the device reliability also at statistical level (TDDB, leakage currents), Fig. 1
Charge transport in high-k stacks for charge-trapping memory applications: A modeling perspective (invited)
Charge trapping (CT) memories could be a promising technology option for further NAND Flash scaling. The assessment of the scalability limits and ultimate performances of this technology demands for the comprehensive understanding of the physical mechanisms governing device operation and reliability, which requires accurate physics-based models reproducing the electrical device characteristics. The basic features of the models presented in the literature for CT memory devices are reviewed, underlining theirsimilarities and differences, and highlighting their importance in order to achieve a comprehensive understanding of the physical mechanisms responsible for CT device operation and reliability. A physical model describing the charge transport in nitride and high-j stacks is also presented, which allows gaining further insights into reliability issues related to charge localization and high-j tunnel and blocking dielectrics, like the effects of the blocking alumina layer and the band-gap engineered tunnel dielectrics on the TANOS device retention
Physical modeling of charge transport and degradation in HfO 2 stacks for logic device and memory applications
The understanding of the physical mechanisms responsible of charge transport and degradation in high-k stacks is fundamental for the optimization of advanced logic (MOSFETs) and memory (RRAM, DRAM) devices. In this paper, we present a comprehensive physical model describing the charge transport and the degradation/breakdown processes in the HfO2 layer. This model allows gaining quantitative insights into the physics governing leakage current and degradation processes in HfO2 stacks, reproducing gate current and TDDB statistic
Going Beyond Counting First Authors in Author Co-citation Analysis
The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
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