1,720,954 research outputs found

    Iterative Instruction Scheduling for a VLIW Processor

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    Instruction scheduling aims to reorder instructions in such a way that it covers the delay between an instruction and its dependent successor(s). As a result, the length of schedules are shortened while the processor utilisation increases. This is accomplished by exploiting Instruction Level Parallelism (ILP). The rearrangements made by instruction scheduling plays an important role in achieving the peak performance of a processor, especially for the ones which do not support out-of-order execution. Optimal scheduling to minimise the number of cycles under an arbitrary pipeline constraints is an NP-complete problem. Hence, most schedulers rely on heuristics in order to arrange the instructions. Although these heuristics are widely used and frequently lead to a fairly good solution, there still might be another instruction order which is better. In this work we bring randomisation to the GNU Compiler Collection GCC) list scheduler to explore the area of possible orders beyond the heuristics. Our core approach involves swapping the priorities of instructions, which does not totally discard the scheduling heuristics. It starts exploring the search space from a fairly good solution obtained by these heuristics. Moreover, as a result of using randomisation in the scheduler, some other problems have been tackled, such as: which part of the search space to explore in a limited amount of time, getting an approximation of how much of the search space is explored, how to fill the delay slots more effiently, etc. We evaluated our algorithms in compilation of programs for a Very Long Instruction Word (VLIW) processor called Embedded Vector Processor (EVP) from ST-Ericsson. Since EVP is used as an embedded Digital Signal Processor (DSP) in mobile devices, it is crucial to have a simple architecture to save power. Which is why, EVP is a non-interlocked exposed pipeline and is highly dependent on the compiler to exploit ILP.CEMicroelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc

    Porting GCC to a Clustered VLIW Processor

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    A clustered architecture is a viable design choice when aiming to increase the performance of a VLIW processor while avoiding the hardware complexity and increased access times associated with a centralized register file. However, this places additional responsibility on the compiler: the production of an efficient cluster assignment. In this thesis, we describe how we ported the GNU Compiler Collection (GCC), a popular free compiler, to a clustered version of the Embedded Vector Processor (EVP), a VLIW vector processor being developed at ST-Ericsson. The aim of this thesis project was to produce a prototype GCC back-end for the clustered EVP, and to benchmark it. In this report we describe our implementation in detail, presenting an approach that tackles the problem of clustering, commenting upon existing algorithms, choosing and improving upon one of them while designing a GCC RTL optimization pass for cluster assignment. We visually inspected our prototype for functional correctness, and benchmarked it against the original EVP design and the corresponding production compiler. Our measurements show a 27% speed-up in compute intensive components of the EVP's W-CDMA workload.Computer EngineeringElectrical EngineeringElectrical Engineering, Mathematics and Computer Scienc

    Going Beyond Counting First Authors in Author Co-citation Analysis

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    The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed

    Variations on the Author

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    “Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship

    Appropriate Similarity Measures for Author Cocitation Analysis

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    We provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis

    Dispelling the Myths Behind First-author Citation Counts

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    We conducted a full-scale evaluative citation analysis study of scholars in the XML research field to explore just how different from each other author rankings resulting from different citation counting methods actually are, and to demonstrate the capability of emerging data and tools on the Web in supporting more realistic citation counting methods. Our results contest some common arguments for the continued use of first-author citation counts in the evaluation of scholars, such as high correlations between author rankings by first-author citation counts and other citation counting methods, and high costs of using more realistic citation counting methods that are not well-supported by the ISI databases. It is argued that increasingly available digital full text research papers make it possible for citation analysis studies to go beyond what the ISI databases have directly supported and to employ more sophisticated methods

    Author Index

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    koamabayili/VECTRON-author-checklist: VECTRON author checklist

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    We have done our best to complete the author checklist relating to the use of animals in the hut study. Note that the objective for the hut study was to evaluate the IRS treatment applications for residual efficacy against Anopheles mosquitoes, including the local An. coluzzii mosquito population. Cows were only used to attract mosquitoes into the huts and no tests were carried out directly on the cows. The author checklist is intended for use with studies where experiments are carried out on animals, which is why we have had such difficulty in completing this for the hut study, as many of the questions do not relate to how the cows were used

    Porting GCC to Exposed Pipeline VLIW Processors

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    EVP and TriMedia are embedded application processors targeted at mobile communication and multimedia domains. Both architectures originate from Philips Semiconductors and are currently developed by ST-Ericsson and NXP Semiconductors, respectively. Both processors have a VLIWarchitecture with an exposed pipeline. Such architectures impose different requirements on a compiler than the majority of existing GCC targets, which are scalar or superscalar machines with interlocked pipelines. First, the exposed pipeline organization requires a compiler to schedule operations such that all data and resource hazards are avoided. Second, a compiler for a VLIW machine has to provide stronger capabilities for discovering and exposing the instruction level parallelism (ILP), as it can not rely on the hardware ILP mechanisms employed in superscalar processors. We have ported GCC to EVP and TriMedia and provided extensions to support code generation for an exposed pipeline VLIW. To increase the amount of exploitable ILP, we have also enhanced the current GCC mechanisms such as loop unrolling and the alias analysis. The ports were benchmarked against the existing production compilers and encouraging results in terms of cycle counts and code size have been achieved.Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
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