1,720,969 research outputs found
Novel Compensation Scheme for Local Clocks of High Performance Microprocessors
No full textClock compensation for process variations and
manufacturing defects is a key strategy to achieve high
performance of processors and high end ASIC. However,
with the increase in process variations and defect
densities, clock compensation is becoming increasingly
challenging. A clock distribution system also consumes
over 30% of the overall chip level power, so every little bit
counts, including compensation schemes. In this paper we
propose a new scheme for the compensation of
undesirable skews and duty-cycle variations of local
clocks of high performance microprocessors and high end
ASICs. Our scheme performs compensation continuously,
during the microprocessor operation, thus allowing also
compensation to clock jitters due to environmental
influences during operation. Compared to alternate
solutions for local clock compensation, our scheme
features lower power consumption, smaller compensation
error, and a lower or comparable area overhead, while
allowing compensation to be accomplished within the
same clock cycle of skew or duty-cycle variation
New Design For Testability Approach for Clock Fault Testing
No full textWe propose a new design for testability approach for testing clock faults of next generation high performance microprocessors. In fact, it has been shown that conventional manufacturing test is unable to guarantee their detection, although they could compromise the effectiveness of delay fault testing, as well as the microprocessor correct operation in the field. These conditions
will of course worsen with technology scaling, due to the expected increase in fault likelihood, included clock faults. To deal with these
problems we propose a design for testability approach that, by means of simple modifications to conventional clock buffers, allows
clock fault detection through any conventional manufacturing test approach. This is achieved at the cost of very low increase in area
and power consumption of clock buffers, and with no additional test cost or impact on the microprocessor performance and in-field
operation. We then introduce a possible further modification to clock buffers that, at additional limited costs in terms of area and power consumption, allows their calibration after fabrication in order to compensate for parameter variations possibly occurring during manufacturing, thus minimizing the likelihood of either false test fails, or test misses. As an example, we show the application of our approach to the clock distribution network of the Pentium14 microprocessor (Other names and brands may be claimed as property of others). However, it can be applied to the clock distribution of any high performance ASIC, or microprocessor
Novel Approach to Clock Fault Testing for High Performance Microprocessors
No full textIn this paper we present a novel approach for testing
clock faults for high performance microprocessors.
Although such faults have been shown to be likely and
could compromise delay fault testing, conventional
manufacturing test methodology is unable to guarantee
their detection. In this paper, we propose a modification
to the conventional clock buffers allowing standard
manufacturing test to detect the faults. This is achieved
at the cost of a small increase in area and power
consumption of the clock buffers, but with no additional
test cost or impact on the microprocessor performance
and in-field operation. Our approach can be applied to
the clock system of any high performance chip or
microprocessor
On-Die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter
No full textWe present a novel low cost scheme for the on-die measurement of either clock jitter, or process parameter variations. By re-using and properly modifying the Ring Oscillators (ROs) that are currently widely employed for process parameter variation measurement in high performance microprocessors, our proposed scheme can be easily set in either the process parameter variation measurement mode, or the clock jitter measurement mode, by acting on an external control signal. This way, during the test or debug phase, clock jitter can also be measured at negligible area and power costs with respect to process parameter variation measurement only. Our scheme is scalable in the provided clock jitter measurement resolution, while allowing the same process parameter variation measurement resolution as the currently employed RO based schemes. Moreover, due to its allowing both process parameter variation and clock jitter measurements, our scheme features accurate clock jitter measurement despite the possible presence of significant process parameter variations
Going Beyond Counting First Authors in Author Co-citation Analysis
Get PDFThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Get PDF“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Can clock faults be detected through functional test?
No full textWe analyze the probability to detect clock faults indirectly through conventional functional testing by considering realistic datapaths derived from ISCAS'85 benchmarks. We show that, even optimistically assuming that we are able to test all short and long paths for min and max delay violations, the detection of clock faults can not be guaranteed, thus mandating new, specific testing approaches for clock faults, otherwise possibly compromising the system correct operation in the field, with dramatic consequences on product quality and defect level
Won’t on-chip clock calibration guarantee performance boost and product quality?
No full textIn today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features are needed to compensate for electrical parameter variations as a result of manufacturing process variations. The calibration features allow performance boost after manufacturing test and maintain such performance levels during normal operation, thus preserving product quality. This strategy has been proven successful commercially. In this paper, we discuss the impact on performance and product quality of both permanent and transient faults possibly affecting these calibration circuits during manufacturing and normal operation, respectively. In particular, we consider the case of an on-chip clock calibration feature of a commercial high performance microprocessor. We will show that some possible permanent faults may render the on-chip clock calibration schemes useless (in process variations’ compensation), while it is impossible for common manufacturing testing to detect this incorrect behavior. This means that a faulty operating microprocessor may pass the testing phase and be put onto the market, with a consequent impact on product quality and increase in Defect Level. Similarly, we will show that some possible transient faults occurring during the microprocessor in-field operation could defeat the purpose of on-chip clock calibration, again resulting in faulty operation of the microprocessor. This has long range implications to microprocessors’ design as well, considering that process variations on die, as well as across the process, would worsen with continued scaling. Proper strategies to test these clock calibration features and to guarantee their correct operation in the field cannot be ignored. Possible design approaches to solve this problem will be discussed
Appropriate Similarity Measures for Author Cocitation Analysis
Get PDFWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
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