1,720,961 research outputs found

    Dataset supporting the article "Improving the Forward Progress of Transient Systems"

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    Data supporting the paper: Daulby, T, Weddell, A, Merrett, G &amp; Savanth, A 2020, &#39;Improving the Forward Progress of Transient Systems&#39; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. </span

    Comparing NVM technologies through the lens of Intermittent computation

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    Intermittent computing (IC) promises long lifetimes for IoT edge devices. Running directly from energy harvesting sources enables these devices to be deployed and left, potentially for decades. As the field of IC progresses from proof-of-concept to deployable devices, the research focus must shift from processor-centric schemes to consideration of the whole system. The non-volatile memory (NVM) technology, as well as the way it is used, will have a significant effect. Properties such as latency, read/write energy, and endurance can vary by orders of magnitude, and this may affect the viability of many schemes presented in the literature. This paper presents a review of the characteristics of both commercially-available and future NVM technologies, and recommends design considerations for IC systems which incorporate these

    Improving the forward progress of transient systems

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    Emerging applications for Internet of Things devices demand smaller mass, size and cost whilst increasing capability and reliability. Energy harvesting can provide power to these ultra-constrained devices, but introduces unreliability, unpredictability and intermittency. Schemes for wireless sensors without batteries or supercapacitors overcome intermittency through saving system state into non-volatile memory before the supply drops below the minimum operating voltage, termed transient or intermittent computing. However, this introduces significant time and energy overheads. This paper presents two schemes that significantly reduce these overheads: entering a sleep mode to avoid saving state and utilising direct memory access (DMA) when state saves are required. Time and energy previously wasted on state saves can instead be used to perform useful computation, termed “forward progress”. We practically validate the proposed approaches across a range of energy sources and IoT benchmarks and demonstrate up to 46.8% and 40.3% increase in forward progress and up to 91.1% and 85.6% reduction in overheads for each scheme respectively

    Dataset supporting the journal article &quot;Pragmatic Memory-System Support for Intermittent Computing using Emerging Non-Volatile Memory&quot;

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    Sivert T. Sliper, William Wang, Nikos Nikoleris, (2022) Pragmatic Memory-System Support for Intermittent Computing using Emerging Non-Volatile Memory. (Accepted/In press) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 14 p All files are in csv or ods format, both of which can be opened in spreadsheet programs like Libre Office Sheet or proprietary alternatives such as Microsoft Excel.</span

    Pragmatic memory-system support for intermittent computing using emerging non-volatile memory

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    Intermittent computing (IC) is a key enabler for the vision of a trillion Internet of Things devices. By harvesting energy from the environment, and leveraging non-volatile memory (NVM) to retain computational progress across power cycles, IC enables untethered and battery-free devices to perform computation whenever ambient energy is available. The backbone of state retention is NVM, and recent advances in energy-efficient NVM have the potential to expand the application domain of IC significantly. Utilizing emerging NVM at the level of bitcells, researchers have proposed non-volatile processors. However, these do not leverage hardware-software co-design, which can be used to overcome hardware limitations and to provide support for application-level constraints such as atomicity. In this paper, we propose MEMIC, a memory architecture tailored for IC devices with byte-addressable NVM. A core focus of MEMIC is to combine volatile-and non-volatile memory in such a way that the operations of IC are as efficient as possible, while also maximizing computational performance per joule. MEMIC uses volatile memory for energy efficiency, and nonvolatile memory for data retention. To avoid double-buffered checkpoints and costly roll-backs when code needs to be reexecuted, MEMIC is designed to track and minimize writes to non-volatile memory during failure-atomic sections. Our evaluation shows that MEMIC&amp;#x2019;s instruction cache reduces workload completion time under intermittent operation by 41-70% and its data cache provides a further reduction of 13-39%.</p

    Ultra-low power 18-transistor fully-static contention-free single-phase clocked flip-flop in 65nm CMOS

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    Flip-flops are essential building blocks of sequential digital circuits, but typically occupy a substantial proportion of chip area and consume significant amounts of power. This work proposes 18TSPC, a new topology of fully-static contention-free Single-Phase Clocked (SPC) Flip-Flop (FF) with only 18 transistors, the lowest number reported for this type. Implemented in 65nm CMOS, it achieves 20% cell area reduction compared to the conventional Transmission Gate FF (TGFF). Simulation results show the proposed 18TSPC is 3 times more efficient than TGFF in the Energy-Delay space. To demonstrate EDA compatibility and circuit/system-level benefits, a shift-register and an AES-128 encryption engine have been implemented. Chip experimental measurements at 0.6V, 25ºC show that, compared to TGFF, the proposed 18TSPC achieves reductions of 68% and 73% in overall and clock dynamic power, respectively, and 27% lower leakage

    CMOS UHF RFID Rectifier Design and Matching: an Analysis of Process and Temperature Variations

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    Radio Frequency (RF) power transfer is an enabling technology of RFID systems. CMOS RF rectifiers enable miniaturization and improved integration with full systems. For certain applications, rectifiers may need to be deployed in high or low temperature environments, which can affect their power conversion efficiency (PCE). This work presents the design of a high efficiency 915 MHz CMOS Dickson charge-pump in a 28 nm FD-SOI process, and investigates antenna-based impedance matching as a method of maximizing the PCE for different temperatures and CMOS process variations. With a co-designed antenna, the proposed rectifier achieves 5.4x higher PCE compared to simple inductive-matching at -20 dBm. The PCE is then analyzed for CMOS process and temperature variations. It is shown that the rectifier can maintain 94% of its peak PCE at -15 dBm at -10°C through input-impedance matching. The proposed rectifier and matching technique achieves the highest PCE compared to state-of-the-art Dickson multipliers, while having the smallest die area

    Photovoltaic cells for micro-scale wireless sensor nodes: measurement and modeling to assist system design

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    Energy harvesting enables perpetual operation of wireless sensor nodes by scavenging energy from the environment. Light energy harvesting using photovoltaic (PV) cells is preferred as they offer the highest volumetric power output allowing nodes to be as small as possible. However, their power output can be spatially and temporally-variable. This work investigates the performance of cm2-scale PV cells, and reports on a new measurement and characterization platform. Results show that micro PV cells perform differently from large panels: power is not simply a function of area and light levels, and manufacturing variability can be a major issue. The method presented enables the rational design of micro-scale systems, including their maximum power point tracking circuits, and the evaluation of techniques for energy-neutrality (such as workload throttling) at design-time

    Going Beyond Counting First Authors in Author Co-citation Analysis

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    The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
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