1,721,016 research outputs found

    Traditional Op-Amp and new VCII: A comparison on analog circuits applications

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    Although the idea of second generation voltage conveyor (VCII) dates back to two decades ago, only in a recent publication by authors, its applications and capabilities were studied. Considering that VCII-based circuits are also realizable by Operational Amplifiers (Op-Amps), in this paper a comparison between circuits implementable using either Op-Amp or VCII is drawn. The transfer function and main characteristics of each implementation are given. To validate the presented theory Spice simulations performed in 0.18 μm CMOS technology with a supply voltage of ±0.9 V are provided. The achieved results show that the circuits based on Op-Amp require a very high gain for this active block, to be traded off with bandwidth. As a consequence, Op-Amp can be successfully replaced by VCII for high frequency applications. In addition, the output of Op-Amp based circuits is of inverting (or non-inverting) type while both inverting and non-inverting outputs are achievable in the VCII based circuits. Other benefits are achieved: more importantly, using VCII to implement non-inverting voltage summing circuit is an effective solution to remove the undesired cross-talk effect that occurs in Op-Amp based one. PSpice simulations complete the comparison

    A new rail-to-rail second generation voltage conveyor

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    In this paper, a novel low voltage low power CMOS second generation voltage conveyor (VCII) with an improved voltage range at both the X and Z terminals is presented. The proposed VCII is formed by a current buffer based on a class AB regulated common-gate stage and a modified rail-to-rail voltage buffer. Spice simulation results using LFoundry 0.15 μm low-Vth CMOS technology with a ±0.9 V supply voltage are provided to demonstrate the validity of the designed circuit. Thanks to the class AB behavior, from a bias current of 10 μA, the proposed VCII is capable of driving 0.5 mA on the X terminal, with a total power consumption of 120 μW. The allowed voltage swing on the Z terminal is at least equal to ±0.83 V, while on the X terminals it is ±0.72 V. Both DC and AC voltage and current gains are provided, and time domain simulations, where the voltage conveyor is used as a transimpedance amplifier (TIA), are also presented. A final table that summarizes the main features of the circuit, comparing them with the literature, is also given

    A New Extremely Low Power Temperature Insensitive Electronically Tunable VCII-Based Grounded Capacitance Multiplier

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    In this brief, a new circuit topology to realize an electronically tunable grounded capacitor multiplier with extremely low power consumption and low supply voltage requirement is investigated. The proposed circuit uses an electronically tunable second generation voltage conveyor (VCII) and a single floating capacitor. Owing to the translinear principle, current gain of VCII is varied through a control current and, as a result, the value of simulated capacitor is also varied. Favorably the obtained gain is temperature insensitive. Both of the required supply voltage and control currents are very low because all transistors are biased in subthreshold region: therefore, electronic tunability is achieved while the power consumption is kept at very low value. In addition, the circuit realization is very simple since only twelve transistors are required. Simulation results, performed at schematic level in 0.18 μ m CMOS technology and supply voltage of ±0.3V, are presented. It is shown that a multiplication factor from 1 to 100 is possible while the power consumption varies from 10 nW to 67 nW

    A new versatile full wave rectifier using voltage conveyors

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    In this paper we propose a new versatile full wave rectifier circuit using voltage conveyor (VCs) as active blocks. The proposed circuit uses two VCs, a single grounded resistor and two diodes. Compared to other previously reported rectifier circuits, it shows a simple and compact structure, employing the minimum possible number of elements. Moreover, the rectified output is available in forms of both voltage and current signals, at low impedance voltage output Z port and high impedance X port of VC, respectively. Therefore, for practical use, the proposed rectifier is cascadable without the need for extra voltage and current buffers. In addition, also the input signal can be applied in both forms of a current and of a voltage. To validate the presented theory, SPICE simulations, using 0.35 μm CMOS technology parameters and supply voltage of ±1.65 V, are reported, together with a set of measurements conducted over an equivalent discrete-level circuit, where AD844s were used to mimic VCs behavior

    A New High Drive Class-AB FVF-Based Second Generation Voltage Conveyor

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    A new low-voltage low-power class-AB second generation voltage conveyor (VCII) is presented. The proposed circuit is based on an improved class-AB flipped voltage follower (FVF) designed by adding a simple negative feedback loop to the conventional class-AB circuit. This modification ensures high current drive capability of at least 2 mA for both falling and rising edges of input signal along with very low 2-mΩ output impedance and high accuracy. Benefiting from the new class-AB FVF, the proposed VCII features a very simple implementation, extremely low impedance at Y and Z terminals (2 mΩ), high impedance at X terminal (370 kΩ) and high accuracy in current and voltage conveying (99% and 98%, respectively). Moreover, it exhibits current drive capability 117.6 times larger than its bias current (17μA ). The circuit occupies 381.5μm× 19μm area. The application of the proposed VCII as a voltage integrator is also presented. Simulation results using PSpice and 0.35-μm CMOS technology with ±1.65-V supply voltage are provided to demonstrate the presented theory. A comparison with the literature is also provided

    Going Beyond Counting First Authors in Author Co-citation Analysis

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    The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed

    A new VCII based grounded positive/negative capacitance multiplier

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    Capacitive multipliers have found wide applications in capacitive interfaces and other analog circuits requiring large value capacitors. Recently a new active building block (ABB) called second generation voltage conveyor (VCII) has been proved to be useful in many analog signal processing applications. Due to the interesting features offered by VCII, in this paper a new VCII based implementation of grounded capacitance multiplier is proposed employing two VCIIs, two resistors and one grounded capacitor. The circuit can produce both positive and negative multiplication factors in a range of -50 to +50. Its main features are wide frequency range, high resolution, low series resistance, simple structure, low power consumption and maximum percentage error of 7.8%. The circuit enjoys high frequency range up to 10 MHz, even if it employs a floating capacitor in its structure. The behavior of the proposed circuit is analysed by taking into account also the effects of VCII parasitic elements and non-ideal gains. SPICE simulation results using a 0.35 mu m CMOS technology parameters are reported. The proposed circuit has been also experimentally tested by using AD844 as VCII. Measurement results on the standalone capacitance multiplier have shown a mean percentage error of 9% across the entire gain range. Finally, the application of the proposed circuit in realizing a low pass filter is also presented to demonstrate the proposed circuit feasibility

    Noise analysis and optimization of VCII-based SiPM interface circuit

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    Recently, second generation voltage conveyor (VCII)-based transimpedance amplifiers (TIAs) have begun to find their way in different applications, among which, silicon photomultipliers (SiPMs) interfacing circuitry. There are many advantages which make VCII-based TIAs attractive over conventional circuits: the intrinsic low impedance at VCII current input Y port is very helpful to mitigate the effect of high value sensor capacitance and provides fast response time; the achieved bandwidth is high and due to current mode operation; the circuits enjoy the low-voltage low-power features. As signal-to-noise ratio is a crucial parameter in SiPMs interface circuit applications, here we consider the noise specifications and optimization of VCII-based SiPM interface circuits. The noise model of VCII is introduced and equivalent noise of a VCII-based interface circuit is derived. Methods to optimize trade-offs existing between key parameters including power consumption, gain and noise performance are discussed. Simulation results are also provided showing a considerable reduction of two orders of magnitude in most of the noise performances when compared to the previous work while preserving other performance parameters

    High performance voltage output filter realizations using second generation voltage conveyor

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    In this article, new voltage-output filter realizations based on second generation voltage conveyor (VCII) as basic building block are presented. The results of this study show that VCII is a suitable candidate for applications requiring a voltage as filter output signal, considering that the availability of a low impedance voltage output terminal in VCII makes unnecessary the use of extra voltage buffers at the filter output, resulting in filter implementations with simpler structure, reduced power consumption, and chip area. New configurations of VCII based filters with first order low-pass (LP), second order LP, and second order bandpass (BP) transfer functions are shown. The proposed circuits enjoy a very simple structure employing only one active element and four passive components. Simulation results for a VCII transistor implementation in a 0.35 μm standard CMOS technology and a supply voltage of ±1.65 V approve the presented theory
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