1,721,187 research outputs found
Speed and Convergence Properties of Improved MOSFET Models Included in the Circuit Simulator AIM-Spice
No full textNEW ANALYTICAL POLYCRYSTALLINE-SILICON THIN-FILM TRANSISTOR MODEL FOR COMPUTER-AIDED-DESIGN AND PARAMETER EXTRACTION
No full textWe present a new analytical model for the current-voltage characteristics of polycrystalline-silicon thin-film transistors (poly-Si TFTs). We use an "effective medium" approach which treats a polycrystalline film with grain boundaries as a uniform effective medium with an effective mobility and density of states in the energy gap. The current-voltage characteristics and their derivatives with respect to terminal voltages are continuous for both the below and above threshold regimes. A new interpretation of the saturation voltage allows us to accurately describe the finite output conductance in saturation, and we also realistically describe the "kink" effect. Our model has only five parameters which are easily extractable from experimental data: ideality factor (eta), low-field mobility (mu-0), threshold voltage (V(T)), output conductance parameter (GAMMA), and kink parameter (V0). We calculate the current-voltage characteristics of n- and p-channel poly-Si TFTs with 5, 6, 10, 15, and 30-mu-m gate lengths and 50-mu-m gate width and obtain a good agreement between calculation and experiment. Our analytical model is suitable for automatic parameter extraction and has been used for computer aided design
UNIFIED QUASI-STATIC MOSFET CAPACITANCE MODEL
No full textAn accurate calculation of MOSFET capacitance-voltage (C-V) characteristics has to account for the bulk charge which is affected by nonuniform doping profiles and short-channel effects. In our approach based on the Unified Charge Control Model (UCCM), we relate the voltage dependencies of the bulk charge to the standard parameters of the body plots which are routinely measured during MOSFET characterization. The results of the C-V calculations based on this model are in good agreement with our experimental data and with the calculations based on the standard BSIM model. Compared to the BSIM simulations, our model more accurately describes capacitances related to the bulk charge and the device subthreshold behavior. The model is suitable for incorporation into circuit simulators
EFFECT OF P-I-P+ BUFFER ON CHARACTERISTICS OF N-CHANNEL HETEROSTRUCTURE FIELD-EFFECT TRANSISTORS
No full textIn order to reduce the two major problems of short-channel effects and limited threshold voltage controllability in submicrometer gate heterostructure FET's (HFET's), a p-i-p+ structure in the buffer is investigated. The p layer is adjacent to the channel and the p+ layer is located fairly far from the channel. This structure lowers the electrostatic potential in the buffer under the channel, which reduces the current in this region. Monte Carlo simulation shows that such a buffer decreases the output conductance in saturation by 80% for a 0.3-mu-m gate delta-doped Modulation Doped FET (MODFET) with n+ self-aligned source and drain regions. The p+ layer has the additional purpose of enabling adjustment of the threshold voltage by way of changing the potential of the p+ layer externally. Our one-dimensional calculations for the modulation-doped AlGaAs/GaAs heterostructures show that a 0.1-V variation of the threshold voltage can be adjusted by a 2-V variation of the back bias when the p+ layer is located 5000 angstrom away from the channel. However, the maximum carrier density n(s max) in the 2-D gas becomes quite limited when high negative bias is applied to the p+ layer or when the distance from the p+ layer to the heterointerface is decreased. This limitation is less severe in delta-doped structures where n(s max) is approximately 70% larger. In Doped Channel HFET (DCHFET) structures, the p+ layer can be brought very close to the n+ doped channel without any important restrictions on n(s max) in the channel. The p layer sheet doping density must also be restricted to approximately 1.5 x 10(12) cm-2 for the MODFET in order to avoid a large reduction of n(s max) Again, this limitation is not important in DCHFET devices. Therefore, use of the p-i-p+ buffer is more advantageous for delta-doped MODFET's than for uniformly doped MODFET' s, and even more so for DCHFET's, where larger charges in the p-i-p+ buffer are required to limit the short channel effects
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Unified I-V Model and Parameter Extraction of Submicron nMOSFET for Circuit Simulaton and Statistical Process Characterization
No full textMODEL FOR MODULATION DOPED FIELD-EFFECT TRANSISTOR
No full textThis work at University of Illinois is funded by the Office of Scientific Research and the work at the University of Minnesota is partially funded by the Army Research Office and Honeywell, Inc
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