1,720,971 research outputs found
Integration-aware Modeling, Simulation and Design Techniques for Smart Electronic Systems
Smart electronic systems represent a vast category of energy-autonomous and ubiquitously connected systems that incorporate analog, digital and MEMS components, combined with various kinds of sensors, actuators, energy storage devices and power sources. Smart systems generally find applications in the worldwide market for "Monitoring & Control" products and solutions, hence they are used in a broad range of sectors, including automotive, healthcare, Internet of Things, ICT, safety and security, and aerospace. In order to support such wide variety of application scenarios, smart systems integrate a multitude of functionalities, technologies, and materials. The design of smart systems is therefore a complex and major multidisciplinary challenge, as it goes beyond the design of the individual components and subsystems. New design and simulation methodologies are fundamental for exploring the design space in order to find the most efficient trade-off between performance and involved resources, and for evaluating and validating system behavior taking into account the interactions between closely coupled components of different nature. Current system level design methods must indeed accurately manage increasing system complexity and interaction effects between the environment and the system and among the components. Nevertheless, the involved components are usually described using different languages, relying on different models of computation, and need to be jointly simulated at various abstraction levels. This dissertation aims at bridging this gap focusing on novel integration-aware solutions for different aspects of a smart system: the design of digital subsystems and components, the modeling of batteries, and the power estimation of smart systems at system level of design abstraction. Although the design flow of digital components is well consolidated and highly standardized (e.g., commercial, fully automated synthesis & optimization tools, technology libraries, etc.), additional integration-aware design constraints arise due to the interaction of components of different technological domains and to the harsh environment where smart systems typically operate. This work presents a methodology for addressing these new constraints, thus enhancing the design of digital components. As a partial fulfillment of such constraints results in a global degradation of performance, the proposed methodology focuses on the effects rather than the physical sources of the constraints. This allows to move from the typical RTL to a system level of abstraction, i.e., SystemC TLM, obtaining a faster validation of the performance of digital subsystems. Energy efficiency is becoming increasingly important for self-powered smart electronic systems, as the amount of energy they can gather from the environment or accumulate in storage devices cannot be considered constant over time. Power supplies have therefore a very heterogeneous nature: depending on the application, more than one type of power source (e.g., photovoltaic cells, thermoelectric or piezoelectric energy generators) and storage device (e.g., rechargeable and non-rechargeable batteries, supercapacitors, and fuel cells) could be hosted onto the system. As a matter of fact, no single power source could provide the desired level of energy density, power density, current, and voltage to the system for all possible workloads. Batteries are being significantly used in smart electronic systems due to the their increased energy capacity, improved production process, and lower cost over the last years. However, a battery is an electrochemical device that involves complicated chemical reactions resulting in many non-idealities of its behavior. Therefore, a smart system designer has to characterize these non-idealities in order to accurately model how the battery delivers power to the system. This dissertation introduces a systematic methodology for the automatic construction of battery models from datasheet information, thus avoiding costly and time-consuming measurements of battery characteristics. This methodology allows generating models for several battery charge and discharge characteristics with tunable accuracy according to the amount of the available manufacturers' data, and without any limitation in battery chemistry, materials, form factor, and size. Finally, this work introduces a modeling and simulation framework for the system level estimation of power end energy flows in smart systems. Current simulationor model-based design approaches do not target a smart system as a whole, but rather single domains (digital, analog, power devices, etc.), and make use of proprietary tools and pre-characterized models having fixed abstraction level and fixed semantics. The proposed methodology uses principles borrowed from the system level functional simulation of digital systems and extends them for simulating the behavior of subsystems whose functionality is to generate, convert, or store energy (e.g., power sources, voltage regulators, energy storage devices, etc.). This has been done at system level using standard open-source tools such as SystemC AMS and IP-XACT, which allow to explicitly represent current and voltage similarly to digital logic signals. The implemented approach facilitates virtual prototyping, architecture exploration, and integration validation, with high flexibility and modularit
An Efficient Simulation Methodology for Electrical Energy Systems
Electrical energy systems (EESs) represent a wide class of systems involving consumption, generation, distribution and storage of energy. Examples of such systems can be found at various scales, ranging from smart systems-on-chip to smart grids. The conventional design methodology uses the model-based approach provided by commercial platforms such as Matlab/Simulink, and relying on built-in model libraries. This paper presents a modeling and simulation methodology for EESs based on the SystemC standard (and its Analog and Mixed-Signal extension SystemC-AMS). Simulations show that the proposed approach provides accuracy comparable to Matlab/Simulink results, with higher modularity and an average speedup of 36
A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection
With the scaling of CMOS technology, critical paths in digital circuits have become largely sensitive to process, voltage and temperature variations as well as to aging effects, generally resulting into a mismatch between the simulated path delay of the circuit obtained with CAD tools and the actual path delay on the manufactured chip. In order to solve this issue and to also avoid conservative strategies based on increasing time margins, adaptive techniques are the most desirable solution because they should automatically sense and correct timing variations online. Implementing such adaptive strategies requires accurate, high resolution and compact delay measurement devices. In this work we propose an effective, fully-digital, online delay measurement circuit that can be entirely implemented in a standard cell technology without the need of custom elements. Our design provides low-cost multi-paths delay monitoring while achieving high accuracy of the measurements (in the order of 30ps
A Framework for Efficient Evaluation and Comparison of EES Models
Electrical energy systems (EES) are systems which consume, generate, distribute and store energy at various scales, ranging from smart systems-on-chip to smart grids. Simulation of EES is a critical task, as it allows to validate system dimensioning and to foresee system lifetime under specific load conditions. This paper proposes a modeling and simulation framework based on the standard language SystemC. The framework is designed for enhancing EES simulation with a high modularity. This allows to evaluate alternative models for EES components, to determine a tradeoff between accuracy and simulation performance. The pa- per formalizes energy and information flows by defining interfaces for the typical components of EESs (e.g., energy storage devices, power sources, converters). Then, it proposes a methodology to seamlessly plug such components into the simulation framework, by adopting models at different levels of detail. Simulations highlight effectiveness and modularity of the proposed approach and prove its accuracy with a comparison w.r.t. Matlab/Simulin
An aging-aware battery charge scheme for mobile devices exploiting plug-in time patterns
The aging of a rechargeable battery is mainly due to stress during charge-discharge cycles. Although the discharge phase is difficult to control, the charging phase can be performed in a specific way in order to mitigate the aging of the battery during its usage. It therefore becomes important to select the correct charging algorithm. In the case of mobile systems, equipped mainly with lithium-ion batteries, the standard widely adopted for charging a battery is the typical constant current/constant voltage (CC-CV) protocol usually based on a linearly regular charge process. In this work, we propose a charging protocol based on the standard CC-CV method in which the charge start time and the value of the charging current can be programmed in such a way that the aging of the battery is mitigated. To validate this charging scheme we use an aging model that includes the charge/discharge current among the major parameters, and an analytical macro-model for the CC-CV charge time analysi
Going Beyond Counting First Authors in Author Co-citation Analysis
The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Modeling and Characterization of Thermally-Induced Skew on Clock Distribution Networks of Nanometric ICs
Temperature has traditionally been a key parameter to take into account during the many stages of IC design flows, and in particular, during the sign-off phases of critical circuit components like the Clock Distribution Networks (CDNs). While for old technologies this task was accomplished by means of worst case corner-based static analysis, the advent of nanometric CMOS technologies made this approach intrinsically inadequate. This paper provides a detailed analysis of clock skew variations induced by non-uniform thermal profiles on tree-like CDNs. Using a dedicated simulation framework, we characterized the complex thermal effects that metal interconnects and buffers under inverted temperature dependence (ITD) may induce on the clock tree. Experiments conducted on a synthetic, thermal-programmable benchmark underline the presence of unexpected behaviors that standard tools are not able to catc
Modeling of thermally induced skew variations in clock distribution network
Clock distribution network is sensitive to large thermal gradients on the die as the performance of both clock buffers and interconnects are affected by temperature. A robust clock network design relies on the accurate analysis of clock skew subject to temperature variations. In this work, we address the problem of thermally induced clock skew modeling in nanometer CMOS technologies. The complex thermal behavior of both buffers and interconnects are taken into account. In addition, our characterization of the temperature effect on buffers and interconnects provides valuable insight to designers about the potential impact of thermal variations on clock networks. The use of industrial standard data format in the interface allows our tool to be easily integrated into existing design flow
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