87,232 research outputs found
Experimental Validation of Class F Waveform Engineering in Class C Biasing Condition
In this paper, the experimental verification of suitable input harmonic injection to achieve class F operating conditions in class bfC (under pinch-off) biased active devices is discussed. In detail, it is demonstrated that by generating a third harmonic component V_g, 3 with a proper phase relationship with respect to the fundamental one V_g, 1, it is possible to change the phase of the resulting output harmonic components, and in particular of the third one I_D, 3, thus generating the proper squaring of the output voltage. Experimental results at device level have shown an improvement in terms of output power and efficiency from 2.24W to 3.00W and from 72.2% to 79.3%, respectively. The proposed approach could play a key role in the maximization of the achievable efficiency of Doherty power amplifiers, where the auxiliary branch needs to be biased in class C for a exploitation of the architecture
Extended operation of class-F power amplifiers using input waveform engineering
Starting from the mathematical bases of waveform engineering, this contribution demonstrates the effectiveness of class-F power amplifier design in different bias conditions, provided the correct harmonic content is presented at the input.
To validate the theoretical assumptions, low-frequency multiharmonic load-pull measurements are carried out on a 1-mm gate periphery GaN HEMT, giving an experimental proof of the validity of the extended harmonic manipulation approach
Aspetti epidemiologici della epizoozia della Bluetongue in Sardegna nel periodo Agosto 2000-Febbraio 2001
A New Approach to Microwave Power Amplifier Design Based on the Experimental Characterization of the Intrinsic Electron-Device Load-line
This paper presents a new original approach to power amplifier design, which is mainly based on low-frequency nonlinear empirical electron device (ED) characterization. The proposed technique enables the same level of accuracy provided by expensive load-pull measurement systems to be obtained through a relatively simple and low-cost setup. Moreover, ED currents and voltages related to reliability issues can be directly monitored. Different experimental examples based on power GaAs and GaN field-effect transistors are provided to demonstrate the validity of the proposed approach
Experimental Validation of Class F Waveform Engineering in Class C Biasing Condition
In this paper the experimental verification of suitable input harmonic injection to achieve class F operating conditions in class C (under pinch-off) biased active devices is discussed. In detail, it is demonstrated that by generating a third harmonic component Vg,3 with a proper phase relationship with respect to the fundamental one Vg,1, it is possible to change the phase of the resulting output harmonic components, and in particular of the third one ID,3, thus generating the proper squaring of the output voltage. Experimental results at device level have shown an improvement in terms of output power and efficiency from 2.24W to 3.00W and from 72.2% to 79.3%, respectively. The proposed approach could play a key role in the maximization of the achievable efficiency of Doherty power amplifiers, where the auxiliary branch needs to be biased in class C for an exploitation of the architecture
Analysis of Efficiency-Limiting Factors Resulting from Transistor Current Source on Class-F and Inverse Class-F Power Amplifiers
This paper describes the efficiency-limiting factors resulting from transistor current source in the case of class-F and inverse class-F (F-1) operations under saturated region. We investigated the influence of knee voltage and gate-voltage clipping behaviors on drain efficiency as limiting factors for the current source. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for class-F-1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT validate our analytical results
Carta della biodiversità vegetale e crittogamica delle aree forestali di Pizzo Manolfo, Crocetta Trippatore e Raffo Rosso
Carta di sintesi della biodiversità vegetale e crittogamica delle aree forestali di Pizzo Manolfo, Crocetta Trippatore e Raffo Rosso (Palermo) correlata a dati climatici ed ecologic
Analysis of Gate-Voltage Clipping Behavior on Class-F and Inverse Class-F Amplifiers
This paper describes the influence of gate-voltage clipping behavior on drain efficiency in case of class-F and inverse class-F operations under saturated regime. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for mathbfclass -mathbfF -1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT support our analytical results
Extraction of an Extrinsic Parasitic Network for Accurate mm-Wave FET Scalable Modeling on the Basis of Full-Wave EM Simulation
This paper describes a new methodology for the extraction of an extrinsic parasitic network suitable for scalable electron device models. The extraction procedure is based on the data obtained through Full-Wave Electro-Magnetic (FW-EM) analyses of the passive structure of a reference device. The new topology proposed proves to be scalable according to simple linear rules derived from geometric considerations. This new parasitic network is used together with a scalable intrinsic device model in order to predict the behavior of different 0.25 μm GaAs PHEMTs (total gate-widths between 300 and 900 μm) belonging to a standard process for millimeter-wave applications. Better accuracy with respect to conventional modeling approaches, is proved up to 80 GHz
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