1,811 research outputs found

    Letteratura e filosofia: i trattati d’amore fra Marsilio Ficino e Giordano Bruno

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    Introduction to the Monographic Section II,Letteratura e filosofia: i trattati d’amore fra Marsilio Ficino e Giordano Bruno, edited by Antonio Gargano and Raffaele Pinto.Introduzione alla Sezione Monografica II, Letteratura e filosofia: i trattati d’amore fra Marsilio Ficino e Giordano Bruno, a cura di Antonio Gargano e Raffaele Pinto

    High-resolution time-to-digital converter in field programmable gate array

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    Two high-resolution time-interval measuring systems implemented in a SRAM-based FPGA device are presented. The two methods ought to be used for time interpolation within the system clock cycle. We designed and built a PCB hosting a Virtex-5 Xilinx FPGA. We exploited high stability oscillators to test the two different architectures. In the first method, dedicated carry lines are used to perform fine time measurement, while in the second one a differential tapped delay line is used. In this paper we compare the two architectures and show their performance in terms of stability and resolution

    Implementation of high-resolution time-to-digital converters on two different FPGA devices

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    This paper describes the development of two high precision Time-to-Digital Converter (TDC) in two different SRAM-based FPGA devices. The time conversion is based on a course counter for long range and on a stabilised delay line for the time interpolation within the system clock cycle. In the first method, dedicated carry lines are used to perform fine time measurement, while in the second one a differential tapped delay line is used. In this paper we compare the two architectures and show their performance in terms of stability and resolution

    High-precision time-to-digital converter in a FPGA device

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    The construction and design process of a high-resolution time-interval measuring system implemented in a SRAM-based FPGA device is discussed in this paper. The TDC can increase the precision on the measurement by interpolating time within the system clock cycle. A two step phase interpolation has been performed, one based on the phase information delivered by the VIRTEX-5 DCM and thus providing a fine time, a second level phase interpolation was based on carry lines thus delivering an iper fine time measurement. We have designed and built a PCB hosting a Virtex-5 Xilinx FPGA. In this paper we show the main characteristics of the board and the performance achieved in terms of resolution. © 2009 IEEE

    High-precision time-to-digital converters in a FPGA device

    No full text
    The construction and design process of two high-resolution time-interval measuring systems implemented in a SRAM-based FPGA device is discussed in this paper. The two TDCs can increase the precision on the measurement by interpolating time within the system clock cycle. In order to perform fine time measurement two different architectures have been realized. The first one uses dedicated carry lines while the second one uses a differential tapped delay line. We designed and built a PCB hosting a Virtex-5 Xilinx FPGA and high stability oscillators to verify the performance of the two different architectures. We show the main characteristics of the board and the performance achieved in terms of stability and resolution. ©2008 IEEE
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