1,721,012 research outputs found
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Full text link“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
Full text linkWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Dispelling the Myths Behind First-author Citation Counts
Full text linkWe conducted a full-scale evaluative citation analysis study of scholars in the XML research field to explore just how different from each other author rankings resulting from different citation counting methods actually are, and to demonstrate the capability of emerging data and tools on the Web in supporting more realistic citation counting methods. Our results contest some common arguments for the continued
use of first-author citation counts in the evaluation of scholars, such as high correlations between author rankings by first-author citation counts and other citation
counting methods, and high costs of using more realistic citation counting methods that are not well-supported by the ISI databases. It is argued that increasingly available digital full text research papers make it possible for citation analysis studies to go beyond what the ISI databases have directly supported and to employ more
sophisticated methods
Scratchpad Memory Management For Multicore Real-Time Embedded Systems
Full text linkMulticore systems will continue to spread in the domain of real-time embedded systems due to the increasing need for high-performance applications. This research discusses some of the challenges associated with employing multicore systems for safety-critical real-time applications. Mainly, this work is concerned with providing: 1) efficient inter-core timing isolation for independent tasks, and 2) predictable task communication for communicating tasks.
Principally, we introduce a new task execution model, based on the 3-phase execution model, that exploits the Direct Memory Access (DMA) controllers available in modern embedded platforms along with ScratchPad Memories (SPMs) to enforce strong timing isolation between tasks. The DMA and the SPMs are explicitly managed to pre-load tasks from main memory into the local (private) scratchpad memories. Tasks are then executed from the local SPMs without accessing main memory. This model allows CPU execution to be overlapped with DMA loading/unloading operations from and to main memory. We show that by co-scheduling task execution on CPUs and using DMA to access memory and I/O, we can efficiently hide access latency to physical resources. In turn, this leads to significant improvements in system schedulability, compared to both the case of unregulated contention for access to physical resources and to previous cache and SPM management techniques for real-time systems.
The presented SPM-centric scheduling algorithms and analyses cover single-core, partitioned, and global real-time systems. The proposed scheme is also extended to support large tasks that do not fit entirely into the local SPM. Moreover, the schedulability analysis considers the case of recovering from transient soft errors (bit flips caused by a single event upset) in several levels of memories, that cannot be automatically corrected in hardware by the ECC unit. The proposed SPM-centric scheduling is integrated at the OS level; thus it is transparent to applications. The proposed scheme is implemented and evaluated on an FPGA platform and a Commercial-Off-The-Shelf (COTS) platform.
In regards to real-time task communication, two types of communication are considered. 1) Asynchronous inter-task communication, between either sequential tasks (single-threaded) or parallel tasks (multi-threaded). 2) Intra-task communication, where parallel threads of the same application exchange data. A new task scheduling model for parallel tasks (Bundled Scheduling) is proposed to facilitate intra-task communication and reduce synchronization overheads. We show that the proposed bundled scheduling model can be applied to several parallel programming models, such as fork-join and DAG-based applications, leading to improved system schedulability. Finally, intra-task communication is governed by a predictable inter-core communication platform. Specifically, we propose HopliteRT, a lean and predictable Network-on-Chip that connects the private SPMs
koamabayili/VECTRON-author-checklist: VECTRON author checklist
No full textWe have done our best to complete the author checklist relating to the use of animals in the hut study. Note that the objective for the hut study was to evaluate the IRS treatment applications for residual efficacy against Anopheles mosquitoes, including the local An. coluzzii mosquito population. Cows were only used to attract mosquitoes into the huts and no tests were carried out directly on the cows. The author checklist is intended for use with studies where experiments are carried out on animals, which is why we have had such difficulty in completing this for the hut study, as many of the questions do not relate to how the cows were used
A Centralized System Performance Monitoring Infrastructure
Full text linkIn this thesis, we introduce a centralized performance monitoring infrastructure. In the current computing landscape, performance monitoring architectures are becoming more and more important for different academic and industrial applications. Performance counters reveal valuable insight into the functioning of the platform. This information can then be exploited for debugging applications, improving performance, identifying bottlenecks, and much more. In our proposed infrastructure, we envision a configurable Advanced Performance Monitoring Unit (APMU) connected to a set of monitoring Event Units (EVU) that are installed in various hardware system IPs across the platform. These EVUs send hardware event information to the APMU. The APMU has smart counters that are capable of operating on the incoming events, and an instruction processor that can implement any desired software mechanisms on the counter data. Our design allows for an efficient collection and correlation of event data, allowing the APMU to get a more holistic insight into the system behaviour, revealing microarchitecture-specific information. We intend to allow users the ability to develop EVUs for IPs relevant to them. For instance, in the implementation phase of this work, we developed an AXI4-based Snooping Unit as a concrete example of a custom-EVU. Therefore, to help integrate such custom EVUs with an APMU infrastructure, we also standardize an EVU-APMU interface. We provide the specification for this interface, ensuring that users can connect any custom-EVU to an APMU, as long as both abide by the interface specification.
In this work, we implement two design IPs. One is the previously mentioned AXI4-based Snooping Unit and the other is a RISC-V compliant APMU. We also provide a software stack to support programming on its processor. The implemented design is emulated on an AMD Virtex UltraScale+ FPGA VCU118 device. To evaluate the implementation of our design, we present the hardware synthesis results for the FPGA, and the execution results of a latency-based regulation case study, demonstrating the functionality of our design
Software Infrastructure for Isolation and Performance Monitoring in Virtualized Systems
No full textModern multiprocessor System-on-Chip (SoC) architectures host a rich tapestry of heterogeneous components, enabling multiple workloads with differing requirements to run simultaneously on the same hardware platform. However, managing and isolating these concurrently running applications presents significant challenges. Traditional virtualization techniques, even with static partitioning hypervisors, could struggle to ensure robust isolation due to contention in shared system resources such as caches and memory bandwidth. To address this issue, this thesis investigates memory bandwidth contention among cores and explores isolation strategies by implementing MemGuard in the Bao Hypervisor on ARMv8-based systems. This implementation is complemented by cache coloring and DRAM bank partitioning techniques. The results, evaluated using the San Diego Vision Benchmark Suite, quantify the effectiveness of these mechanisms in reducing interference and provide insights into program behavior under varying isolation parameters.
Beyond improving isolation, performance monitoring must extend beyond core-level observation to encompass system-wide interactions. To this end, this thesis develops a comprehensive software infrastructure for an Advanced Performance Monitoring Unit (APMU), designed for event-driven monitoring and dynamic runtime reconfiguration. By leveraging an LLVM-based toolchain to support custom instructions and integrating seamlessly with the hypervisor and guest OS layers, the APMU framework enables diverse applications while optimizing memory utilization and execution time.
Collectively, the results and infrastructure presented in this work contribute to more predictable, secure, and efficient computing systems, advancing the state of the art in virtualization, performance isolation, and heterogeneous system analysis
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