146 research outputs found
08281 Abstracts Collection – Software Engineering for Trailor-made Data Management
No full textFrom July 6th to July 11th, 2008, the Dagstuhl Seminar 08281 ``Software Engineering for Tailor-made Data Management'' was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl.
During the seminar, several participants presented their current
research, and ongoing work and open problems were discussed. Abstracts of
the presentations given during the seminar as well as abstracts of
seminar results and ideas are put together in this paper. The first section
describes the seminar topics and goals in general.
Links to extended abstracts or full papers are provided, if available
08281 Executive Summary – Software Engineering for Tailor-made Data Management
No full textTailor-made data management software (DMS) is not only important in the field
of embedded systems. DMS that incorporates only features that are required bear
the potential to strip down the code base and to improve reliability and
maintainability. In the past 20 years several new technologies have emerged
that aim at lean, efficient, and well-structured software, which should also be
applicable to DMS. In the Dagstuhl Seminar ``Software Engineering for
Tailor-made Data Management'', July 6h to July 11th, 2008, 29 researchers from
7 countries discussed the development, application, and assessment of these new
technologies in the context of DMS
Energy-aware design of hardware and software for ultra-low-power systems
No full textFuture visions of the Internet of Things and Industry 4.0
demand for large scale deployments of mobile devices while removing
the numerous disadvantages of using batteries: degradation, scale, weight,
pollution, and costs. However, this requires computing platforms with extremely
low energy consumptions, and thus employ ultra-low-power hardware, energy
harvesting solutions, and highly efficient power-management hardware and
software.
The goal of these power management solutions is to either achieve power
neutrality, a condition where energy harvest and energy consumption equalize
while maximizing the service quality, or to enhance power efficiency for
conserving energy reserves. To reach these goals, intelligent power-management
decisions are needed that utilize precise energy data.
This thesis discusses the measurement of energy in embedded systems, both
online and by external equipment, and the utilization of the acquired data for
modeling the power consumption states of each involved hardware component.
Furthermore, a method is shown to use the resulting models by instrumenting
preexisting device drivers.
These drivers enable new functionalities, such as online energy accounting and
energy application interfaces, and facilitate intelligent power management
decisions.
In order to reduce additional efforts for device driver reimplementation and
the violation of the separation of concerns paradigm, the approach shown
in this thesis synthesizes instrumentation aspects for an
aspect oriented programming language, so that the original device-driver
source code remains unaffected.
Eventually, an automated process of energy measurement and data
analysis is presented. This process is able to yield precise energy models
with low manual effort. In combination with the instrumentation synthesis of
aspect code, this method enables an accelerated creation process for energy
models of ultra-low-power systems. For all proposed methods,
empirical accuracy and overhead measurements are presented.
To support the claims of the author, first practical energy aware and
wireless-radio networked applications are showcased: An energy-neutral light
sensor, a photovoltaic-powered seminar-room door plate, and a sensor network
experiment testbed for research and education
Software fault injection and localization in embedded systems
No full textInjection and localization of software faults have been extensively researched, but the results are not directly transferable to embedded systems. The domain-specific constraints applying to these systems, such as limited resources and the predominant C/C++ programming languages, require a specific set of injection and localization techniques. In this thesis, we have assessed existing approaches and have contributed a set of novel methods for software fault injection and localization in embedded systems.
We have developed a method based on AspectC++ for the injection of errors at interfaces and a method based on Clang for the accurate injection of software faults directly into source code. Both approaches work particularly well in the context of embedded systems, because they do not require runtime support and modify binaries only when necessary. Nevertheless, they are suitable to inject software faults and errors into the software of other domains.
These contributions required a thorough assessment of fault injection techniques and fault models presented in literature over the years, which raised multiple questions regarding their validity in the context of C/C++. We found that macros (particularly header files), compile-time language constructs, and the commonly used optimization levels introduce a non-negligible bias to experimental results achieved by injection methods operating on any other layer than the source code. Additionally, we found that the textual specification of fault models is prone to ambiguities and misunderstandings. We have conceived an automatic fault classifier to solve this problem in a field study.
Regarding software fault localization, we have combined existing methods making use of program spectra and assertions, and have contributed a new oracle type for autonomous localization of software faults in the field. Our evaluation shows that this approach works particularly well in the context of embedded systems because the generated information can be processed in real-time and, therefore, it can run in an unsupervised manner.
Concluding, we assessed a variety of injection and localization approaches in the context of embedded systems and contributed novel methods where applicable improving the current state-of-the-art. Our results also point out weaknesses regarding the general validity of the majority of previous injection experiments in C/C++
Source code for: Compiler-Implemented Differential Checksums: Effective Detection and Correction of Transient and Permanent Memory Errors
No full textThis data set contains the source code for the compiler-implemented differential checksums as described in the following publication:
Christoph Borchert, Horst Schirmeier, and Olaf Spinczyk.
Compiler-Implemented Differential Checksums: Effective Detection and Correction of Transient and Permanent Memory Errors.
In Proceedings of the 53rd IEEE/IFIP International Conference on Dependable Systems and Networks (DSN '23).
Piscataway, NJ, USA, June 2023. IEEE Press
Efficient fault-injection-based assessment of software-implemented hardware fault tolerance
No full textWith continuously shrinking semiconductor structure sizes and lower supply
voltages, the per-device susceptibility to transient and permanent hardware
faults is on the rise. A class of countermeasures with growing popularity
is Software-Implemented Hardware Fault Tolerance (SIHFT), which avoids
expensive hardware mechanisms and can be applied application-specifically.
However, SIHFT can, against intuition, cause more harm than good, because
its overhead in execution time and memory space also increases the figurative
“attack surface” of the system – it turns out that application-specific configuration of SIHFT is in fact a necessity rather than just an advantage.
Consequently, target programs need to be analyzed for particularly critical spots to harden. SIHFT-hardened programs need to be measured and compared throughout all development phases of the program to observe reliability improvements or deteriorations over time. Additionally, SIHFT implementations
need to be tested.
The contributions of this dissertation focus on Fault Injection (FI) as an assessment technique satisfying all these requirements – analysis, measurement and comparison, and test. I describe the design and implementation of an FI tool, named Fail*, that overcomes several shortcomings in the state of
the art, and enables research on the general drawbacks of simulation-based
FI. As demonstrated in four case studies in the context of SIHFT research,
Fail* provides novel fine-grained analysis techniques that exploit the newly
gained possibility to analyze FI results from complete fault-space exploration.
These analysis techniques aid SIHFT design decisions on the level of program
modules, functions, variables, source-code lines, or single machine instructions.
Based on the experience from the case studies, I address the problem
of large computation efforts that accompany exhaustive fault-space exploration
from two different angles: Firstly, I develop a heuristical fault-space
pruning technique that allows to freely trade the total FI-experiment count
for result accuracy, while still providing information on all possible faultspace
coordinates. Secondly, I speed up individual TAP-based FI experiments
by improving the fast-forwarding operation by several orders of magnitude
for most workloads. Finally, I dissect current practices in FI-based evaluation
of SIHFT-hardened programs, identify three widespread pitfalls in the
result interpretation, and advance the state of the art by defining a novel
comparison metric
Performance Models for Embedded Software Product Lines
No full textSoftware product lines deal with functional properties (features) of configurable software systems.
However, these systems also have non-functional properties such as latency, energy usage, or memory footprint.
Performance models formalize knowledge about those properties and their relation to individual features; they are often crucial to building competitive products.
While the literature offers a variety of performance modelling methods for conventional product lines, these do not address configurable device drivers and hardware components.
Moreover, many approaches either rely on time-consuming and error-prone manual annotations, or result in models that are so complex that engineers cannot gain insights by analysing them.
This thesis covers interpretable performance models for configurable embedded systems, including software product lines, configurable hardware components, and hybrid product lines that combine both.
It focuses on automation for the entire life cycle, ranging from unattended data acquisition over machine learning methods for model generation to performance-aware product line configuration.
In doing so, it shows that the disjoint Product Line Engineering and Internet of Things communities address similar challenges, and combines and extends aspects from both to obtain accurate and interpretable performance models for hybrid and hardware-centric software systems.
Its key contribution is the Regression Model Tree data structure and machine learning method.
Regression model trees resemble the structure of feature models, but exclusively rely on benchmark data for model generation.
They can be used with software product lines, configurable hardware components and hybrid product lines, and can be learnt – and understood – even if no feature model is available.
An evaluation on eight product lines and product line-like system components shows that regression model trees are more accurate and less complex than other tree-based modelling methods when applied to hybrid product lines and hardware components.
In addition, this thesis contributes a method for energy measurement automation even if no out-of-band synchronization methods are available, an analysis of whether performance models should be part of feature models or kept separate, a product line perspective on configurable hardware components and device drivers, and case studies that apply regression model trees to real-world product lines.
The analysis finds that performance models should be kept separate; regression model trees follow this approach.
The case studies cover both manual model analysis and tool-assisted performance-aware configuration of Kconfig-based product lines
Entwurf eines energiegewahren Treibermodells für eingebettete Betriebssysteme,
No full textIn eingebetteten Betriebssystemen ist die Kenntnis der genauen
(momentanen) Leistungsaufnahme einzelner Peripheriekomponenten
zumeißt unbekannt, sodass diese Informationen nicht in Verhaltensentscheidungen
zur Laufzeit einfließen. Zudem fehlt für die Analyse
der Systemsoftware hinsichtlich ihres Energieverhaltens ein Zusammenhang
zwischen Peripheriezugriffen und dem damit verbundenem
Verbrauch. Um diese Lücke zu schließen, wird in dieser Arbeit
die Treiberschicht eines eingebetteten Betriebssystems dahingehend
umgestaltet, dass der Energieverbrauch von Peripheriegeräten in jedem
Betriebszustand abgefragt werden kann und Treiberzugriffe mit
entsprechenden Kosten annotiert werden. Hierzu wird das Modell
der Priced Timed Automata (PTA) herangezogen und vollständig in
die Treiberimplementierung integriert. Der Ansatz wird anhand von
representativen Komponenten hinsichtlich seiner Exaktheit und seines
Ressourcenverbrauchs evaluiert, sowie eine Methodik zur vereinfachten
Treiberentwicklung nach diesem Modell vorgestell
Co-Konfiguration von Hardware- und Systemsoftware-Produktlinien
No full textHardwarearchitekturen im Kontext von Eingebetteten Systemen werden immer komplexer und bewegen sich zukünftig immer häufiger in Richtung von Multi- oder Manycore-Systemen. Damit diese Systeme ihre optimale Leistungsfähigkeit – für die oftmals speziellen Aufgaben im Kontext von Eingebetteten Systemen – ausspielen können, beschäftigen sich ganze Forschungszweige mit der anwendungsspezifischen Maßschneiderung dieser Systeme. Insbesondere die Popularität von Hardwarebeschreibungssprachen trägt dazu ihren Teil bei. Jedoch ist die Entwicklung von solchen Systemen, selbst bei der Verwendung von Hardwarebeschreibungssprachen und der damit verbundenen höheren Abstraktionsebene, aufwendig und fehleranfällig.
Die Verwendung von Hardwarebeschreibungssprachen lässt allerdings die Grenze zwischen Hard- und Software verschwimmen, denn Hardware kann nun – ähnlich wie auch Software – in textueller Form beschrieben werden. Dies eröffnet Möglichkeiten zur Übertragung von Konzepten aus der Software- auf die Hardwareentwicklung. Ein Konzept um der wachsenden Komplexität im Bereich der Softwareentwicklung zu begegnen, ist die organisierte Wiederverwendung von Komponenten, wie sie in der Produktlinienentwicklung zum Einsatz kommt. Inwieweit sich Produktlinienkonzepte auf Hardwarearchitekturen übertragen lassen und wie Hardware-Produktlinien entworfen werden können, soll in dieser Arbeit detailliert untersucht werden. Die Vorteile der Produktlinientechniken, wie die Möglichkeit zur Wiederverwendung von erprobten und zuverlässigen Komponenten, könnten so auch für Hardwarearchitekturen genutzt werden, um die Entwicklungskomplexität zu reduzieren und so mit erheblich geringerem Aufwand spezifische Hardwarearchitekturen entwickeln zu können. Zudem kann durch die gemeinsame Codebasis einer Produktlinie eine schnellere Markteinführungszeit unter geringeren Entwicklungskosten realisiert werden.
Auf Basis dieser neuen Konzepte beschäftigt sich diese Arbeit zudem mit der Fragestellung, wie zukünftig solche parallelen Systeme programmiert und automatisiert optimiert werden können, um den Entwickler von der Anwendung über die Systemsoftware bis hin zur Hardware mit einer automatisierten Werkzeugkette bei der Umsetzung zu unterstützen. Im Fokus stehen dabei die in dieser Arbeit entworfenen Techniken zur durchgängigen Konfigurierung von Hardware und Systemsoftware. Diese Techniken beruhen im Wesentlichen auf den Programmierschnittstellen zwischen den Schichten, deren Zugriffsmuster sich statisch analysieren lassen. Die so gewonnenen Konfigurationsinformationen lassen sich dann zur automatisierten Maßschneiderung der Systemsoftware- und Hardware-Produktlinie für ein spezifisches Anwendungsszenario nutzen.
Die anwendungsspezifische Optimierung der Systeme wird in dieser Arbeit mittels einer Entwurfsraumexploration durchgeführt. Der Fokus der Entwurfsraumexploration liegt allerdings nicht allein auf der Hardwarearchitektur, sondern umfasst ebenso die Softwareebene. Denn neben der Maßschneiderung der Systemsoftware, wird auch die auf einer parallelen Programmierschnittstelle aufsetzende Anwendung innerhalb der Entwurfsraumexploration automatisch skaliert, um die Leistungsfähigkeit von Manycore-Systemen ausschöpfen zu können
Automatisierte Verfeinerung von Energiemodellen für eingebettete Systeme
No full textBei der Entwicklung und Nutzung von eingebetteten Systemen werden häufig Energiemodelle der einzelnen Systemkomponenten benötigt, um den Energiebedarf des Gesamtsystems abschätzen zu können. Die Erstellung und Verfeinerung solcher Modelle bedeutet meist aufwändige Handarbeit, da die notwendigen Mess- und Auswertungsschritte von den jeweiligen Komponenten abhängen. Diese Arbeit zeigt, dass es trotz der Unterschiede zwischen verschiedenen Peripheriegeräten möglich ist, mit einem generischen Konzept eine automatisierte Modellverfeinerung durchzuführen. Dazu wird anhand eines Gerätetreibers und eines vorgegebenen Automatenmodells des Geräts ein repräsentatives Testprogramm generiert, eine Reihe von Messungen durchgeführt und ausgewertet und das Automatenmodell zu einem Energiemodell verfeinert. Falls das Modell konfigurierbare Parameter wie Sendeleistung oder Datenrate angibt, werden Abhängigkeiten von diesen Parametern automatisch erkannt und analytisch beschrieben. Zusätzlich werden zwei Methoden zur Modellierung der Transitionsenergie verglichen. Eine Evaluation einer prototypischen Implementierung mit verschiedenen Arten von Peripheriegeräten zeigt, dass viele statische und dynamische Modelleigenschaften zuverlässig erkannt und modelliert werden
- …
