16 research outputs found
The Investigation of Auto-Zero Comparator Performance of Common Gate Differential Amplifier Based CMOS Inverter Circuit
No full textThe Investigation of Auto-Zero Comparator Performance of Common Gate Differential Amplifier Based CMOS Inverter Circuit
Abstract - In this study, the performance of the common gate difference amplifier cmos inverter circuit as an auto-zero comparator circuit was investigated using 0.18μm CMOS process model in the NCSU Design Kit of the Cadence IC5141 design program. The performance of the proposed structure was compared with traditional inverter circuit and darlington cmos inverter circuit. In accordance with the results of DC analysis, the voltage gain of the proposed circuit is 138, 92 V/V and it has more gain than the investigated circuits. According to obtained simulation results, the rising edge and descending edge delay times are observed 0.81ns and 0.99ns while operating with a clock frequency of 5GHz and an input frequency the rising and the descending ramp signal of 50 MHz, respectively. The average power consumption of the proposed structure is 15,4mW under the same conditions.
Index Terms— Common Gate Differential Amplifier Based CMOS Inverter Circuit, Auto-Zero Comparator, Darlington CMOS Inverter, Traditional Inverter Circuit
Journal of Scientific, Technology and Engineering ResearchAytar, O . (2020). Ortak Gate Fark Yükselteç Tabanlı CMOS İnverter Devresinin Auto-Zero Karşılaştırıcı Performansının İncelenmesi . Journal of Scientific, Technology and Engineering Research , 1 (2) , 25-32 . DOI: 10.5281/zenodo.406956
Design of Parallel Analog to Digital Converter Based on Darlington CMOS Inverter
No full textThis article presents a 4-bit parallel analog-to-digital converter was designed by using Darlington CMOS Inverter which is operated in accordance with CMOS threshold voltage. Thus, there is no need to use resistance array block for obtaining quantization voltage in this structure. Generally, the darlington structure is used on bipolar junction transistor circuits, however it is proposed for CMOS circuits in this study. Hence, the gain of inverter circuit
increases. According to simulation results, power consumption is 96.6mW, DNL and INL errors are (-0.71/+0.82)LSB and (0/-1.24)LSB respectively. The provided power consumption,
DNL and INL measures are observed at 100MHz input with 10GS/s sampling rate. All the simulation results were obtained from schematic circuits
Katlamalı ve aradeğerlemeli analog sayısal dönüştürücülerin vlsı tasarımında eşik evirmeli nicemleyici tekniğinin kullanımı ve performansı
No full text
EŞİK EVİRMELİ NİCEMLEYİCİ TEKNİĞİ KULLANILARAK YAPILAN 5 BİT YÜKSEK HIZLI PARALEL A / S DÖNÜŞTÜRÜCÜLERDE SAYISAL KODLAMA DEVRELERİ PERFORMANSLARININ İNCELENMESİ
Get PDFBu çalışmada 0.18μm TSMC CMOS teknoloji kütüphanesi kullanılarak 5 bit yüksek hızlı paralel analog sayısal dönüştürücü( A / S ) tasarımı yapılmıştır. Tasarımı yapılan A / S dönüştürücü temel olarak karşılaştırıcı ve sayısal kodlama bloğu olmak üzere iki önemli blok devresinden oluşmaktadır. Burada karşılaştırıcı bloğu olarak eşik evirmeli nicemleyici tekniği(EEN) kullanılmıştır. Sayısal kodlama bloğunda ise, farklı kodlama devreleri kullanılmıştır. Böylece EEN tekniği kullanılarak yapılan A / S dönüştürücüler için sayısal kodlama blok devrelerinin performansları incelenmiştir. Tasarımı yapılan bütün devrelerde besleme gerilimi 1.8V’tur. Sayısal kodlama blok devreleri olarak programlanabilir rom(pla-rom), lojik tabanlı, seçici(multiplexer) tabanlı, Fat Tree ve Wallace Tree olmak üzere 5 farklı yapı kullanılmıştır. A / S dönüştürücünün güç tüketimi, kodlama devresinde kullanılan transistör sayıları, INL ve DNL performansları incelenmiştir. Yapılan bu çalışmaya göre EEN tekniği ile yapılan A / S dönüştürücü de en yüksek güç tüketimi 291.42mW ile “Wallace Tree”, güç tüketimi en düşük 27.378mW ile “pla-rom”, 152 adet nmos ve pmos kullanımı ile en düşük transistör sayısına sahip olan kodlayıcı “lojik tabanlı” kodlayıcı olarak görülmüştür. INL-DNL performanslarına göre en kötü performans “Fat Tree”, en iyi performans ise “Lojik tabanlı” kod dönüştürücü de gözlenmiştir
4 Bit Flash Tabanlı Zaman Sayısal Dönüştürücü Tasarımı
Get PDFYapılanbu çalışmada, Tanner Tools Pro devre tasarım programında 0.25μm CMOS modelkütüphanesi kullanılarak flash tabanlı 4 bit Zaman-Sayısal Dönüştürücü(Z /S)(Time-to-DigitalConverter(TDC)) yapısı önerilmiştir. Tasarlanan zaman-sayısal dönüştürücüdevresi; zaman geciktirme birimi, karşılaştırıcı, dinamik tutucu, çoğullayıcıdevre ve PLA-ROM devre bloklarından oluşmaktadır. Önerilen bu Z/S dönüştürücütasarımı 3.3V besleme gerilimi altında toplam 126.3mW güç harcamaktadır.Tasarlanan Z/S dönüştürücünün çözünürlüğü 1.31ns olup, INL değeri(-0.28/0.29)LSB ve DNL değeri (-0.2/+0.6) LSB olarak bulunmuştu
A 10-GSamples/s track and hold amplifier using reference current source unaffected by temperature in 0.18µm SiGe BiCMOS technology
No full textA 10 GS/s time-interleaved ADC in 0.25 micrometer CMOS technology
No full textAbstract
This paper presents design and simulation of a 4-bit 10 GS/s time interleaved ADC in 0.25 micrometer CMOS technology. The designed TI-ADC has 4 channels including 4-bit flash ADC in each channel, in which area and power efficiency are targeted. Therefore, basic standard cell logic gates are preferred. Meanwhile, the aspect ratios in the gate designs are kept as small as possible considering the speed performance. In the literature, design details of the timing control circuits have not been provided, whereas the proposed timing control process is comprehensively explained and design details of the proposed timing control process are clearly presented in this study. The proposed circuits producing consecutive pulses for timing control of the input S/H switches (ie the analog demultiplexer front-end circuitry) and the very fast digital multiplexer unit at the output are the main contributions of this study. The simulation results include +0.26/−0.22 LSB of DNL and +0.01/−0.44 LSB of INL, layout area of 0.27 mm2, and power consumption of 270 mW. The provided power consumption, DNL and INL measures are observed at 100 MHz input with 10 GS/s sampling rate.</jats:p
Life and health of young people in relation to their sexual orientation: A study in Thailand and Sweden
No full textLife and health of young people in relation to their sexual orientation: A study in Thailand and Sweden Anchalee Thitasan a*, Osman Aytar b, Eva-Maria Annerbäck c, Marianne Velandia da Obstetric Department, Boromarajonnani College of Nursing Sunpasittiprasong, Muang, Ubon Ratchathani, 34000b School of Health, Care and Social Welfare, Mälardalen University, P.O. Box 325, SE-631 05, Eskilstuna, Swedenc Centre for Clinical Research, Uppsala University, Eskilstuna Sweden.d School of Health, Care and Social Welfare, Mälardalen University, P.O. Box 883, SE-721 23, Västerås, SwedenCorresponding Author Anchalee Thitasan; E-mail: [email protected] Abstract Background: In many societies sexual minorities are not fully accepted. The experiences of oppression, stigma and discrimination may negatively influence young people’s life and health, in relation to the heterosexual norm as a standard. There is a lack of studies comparing sexual orientation of young people in relation to their living conditions and health between Asian and European countries, therefore Thailand and Sweden were purposively selected. In Sweden youth friendly services concerning sexual and reproductive health and rights are provided for all young people through youth clinics. Unlike in Sweden, young people in Thailand are likely to receive less support regarding sexual health and sexuality. This can lead to different health consequences especially among sexual minority groups.Objectives: The aim of this study was to examine associations between sexual orientation and life and health of young people in Thailand and Sweden.Study design: A cross-sectional study was performed using data from the Life and Health – Young surveys in Thailand and Sweden in year 2014. Data were analyzed for grade 11 students in Thailand (n=1,488) and year 2 students in Sweden (n=2,381). Multiple correspondence analysis was used to examine the association among variable categories of sexual orientation, living conditions, lifestyles and health variables. Preliminary result showed that students who identified themselves as bisexual, homosexual or unsure sexual orientation were more closely related with self-harm and poor health than their heterosexual counterparts. Conclusion: Sexual orientation was associate with life and health of young people both in Thailand and in Sweden. The findings can be beneficial to improve health and wellbeing of young people in relation to their sexual orientation.</p
