1,720,962 research outputs found
Variatie van prestaties in digitale systemen: Applicatie afhankelijke modellering en mitigatie
Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface variation phenomena, that degrade system's performance and threaten functional operation. Hence, the need to capture and describe these mechanisms, as well as effectively mitigate their impact is crucial. To this extent, we will focus on capturing, describing and characterizing variation threats in an efficient and accurate manner. In addition, we will move forward by proposing and developing a novel mitigation scheme that could tackle with performance variability and ensure dependability. First, we will study basic reliability phenomena that cause parametric and functional failures in digital systems. Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), Random Dopand Fluctuation (RDF) are some of the dominant variation threats. After understanding the physics of these phenomena, we will proceed with following (or even developing) accurate and efficient models to describe them. This step is necessary in order to effectively mitigate performance variability later on. After having such models in our disposal, the main target of our research will be to study state-of-the-art (SoTA) mitigation mechanisms of performance variability. Finally, our aim is to propose a novel mitigation scheme that introduces an accurate yet energy-efficient approach to manage performance dependability.status: Publishe
Fast Estimations of Failure Probability Over Long Time Spans
Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface time-zero and time-dependent variation phenomena that degrade system's performance and threaten functional operation. Hence, the need to capture and describe these mechanisms, as well as effectively model their impact is crucial. To this extent, we follow existing models and propose a complete framework that evaluates failure probability of electronic components. To assess our framework, a case-study of packet-switched Network on Chip (NoC) routers is presented, studying the failure probability of its SRAM buffers
Διακύμανση της λειτουργίας ψηφιακών συστημάτων: μοντελοποίηση και αντιμετώπιση
The computer industry is witnessing an unprecedented demand for more functionality and performance and is continuously using silicon components with smaller form factor and feature size. This aggressive downscaling of hardware components has brought about several failure mechanisms that degrade the system’s operation, threatening its dependability. Such failure mechanisms can be the result of the natural occurring variation in the attributes of circuit elements during the fabrication procedure, or can be attributed to the aging and the gradual wearout of the hardware and other variability effects related to space particles and power/ground line voltage variation. The inherent stochastic nature of these failure phenomena contributes to the so-called performance variation of digital systems, in the sense that system behavior and response cannot be fully deterministic and have a dynamic component.In the software layer, computational- and data-intensive applications, user interaction and quality of service conditions also generate persistently varying and unpredictable workloads, deteriorating this effect. While software applications are becoming even more complex and resource-hungry (especially due to the continued “virtualization” that leads to the ubiquitous use of run-time threads and dynamic memory allocation) and since the shrinking of transistor and interconnect dimensions is not expected to end in this decade, we can assume that we have already entered an era of inevitable, strongly dynamic performance variation.Under this highly dynamic context of system operation, ensuring dependability and meeting timing constraints seems challenging. The goal of the current research is to study existing methodologies that mitigate performance variation and develop related schemes that can ultimately ensure and guarantee timing deadlines. For this reason, first the dominant failure mechanisms which create defects is the silicon layer and deteriorate the reliability of the system are presented. A thorough review of the prior art on the subject of reliability mitigation is also shown, in order to realize the current, state-of-the-art mitigation approaches and methodologies. Then, the aforementioned reliability threats need to be captured and modeled while their impact on the system’s performance should be described and estimated. Hence, existing tools are employed, and new ones are suggested, in order to develop a complete framework that effectively evaluates the failure probability of electronic components, focusing especially on the SRAM buffers of NoC routers. Later, a realistic case study of a closed-loop PID controller is presented to mitigate performance variation with a reactive DVFS response. This scheme is compared against the version of a Linux CPU frequency governor in terms of energy consumption and timing response. Moreover, another flavor of this scheme is presented, to perform thermal management. Again this controller is implemented on pure hardware and illustrated with a realistic case study.Next, the aforementioned PID controller is improved to operate on finer granularity, at the thread node level. The concepts of performance and deadline vulnerability factor are introduced to support the formulation of a discrete time control problem while the basis of this new approach utilizes the system scenario methodology; this methodology, along with related terms and definitions, is studied in detail. In addition, a run-time adjustment on this methodology to adapt to performance variability norms is shown, creating an adaptive scenarios scheme and achieving notable energy gains. Still, however, performance variation is managed with a reactive response and no timing guarantees are yet delivered.Finally, proactive DVFS actuations on the thread node level are proposed, using dynamic scenarios to guarantee timelines in a cost-efficient manner. By exploiting the partial predictability of the application behavior, a dynamic scenario approach is developed to enable cost-effective DVFS decisions. Simulation results present significant energy gains compared to previous frequency guardband methods while experimental results on the hardware platform substantiate the effectiveness of our scheme.Η βιομηχανία υπολογιστών βιώνει ολοένα κι αυξανόμενη (ανευ προηγουμένου)ζήτηση για αυξημένη λειτουργικότητα και επίδοση, χρησιμοποιώντας συνεχώς πυριτίο με όλο και μικρότερα μεγέθη χαρακτηριστικών και συντελεστή μορφής. Η επιθετική σμίκρυνση των συνιστωσών υλικού οδήγησε αναπόφευκτα σε νέους μηχανισμούς σφαλμάτων, τα οποία αποτελούν απειλή για την αξιοπιστία και την εύρυθμη λειτουργία του συστήματος. Τα σφάλματα αυτά μπορεί να οφείλονται στιςεύλογες διακυμάνσεις των χαρακτηριστικών και διαστάσεων των στοιχείων του κυκλώματος κατά την κατασκευή, ή να αποδίδονται στη γήρανση και τη σταδιακή φθορά του υλικού. Η εγγενώς στοχαστική φύση αυτών των μηχανισμών είναι η γενεσιουργός αιτία της αποκαλούμενης ‘διακύμανσης επίδοσης’ των ψηφιακών συστημάτων, υπό την έννοια ότι η συμπεριφορά κι απόκριση του συστήματος δενμπορεί να είναι απόλυτα ντετερμινιστική αλλά ενέχει και μια δυναμική συνιστώσα.Στα πλαίσια του δυναμικού αυτού περιβάλλοντος λειτουργίας του συστήματος, η διασφάλιση της αξιοπιστίας και η πλήρωση των χρονικών περιορισμών φαντάζει δύσκολη πρόκληση. Στόχος της παρούσας εργασίας είναι η μελέτη υπαρχουσών μεθοδολογιών για τη μείωση της διακύμανσης επίδοσης και η ανάπτυξη σχετικών μεθόδων που μπορούν να διασφαλίσουν και να εγγυηθούν τους χρονικούς περιορισμούς. Στα πλαίσια αυτά, αρχικά θα παρουσιαστούν εν συντομία οι κυρίαρχοι μηχανισμοί σφαλμάτων που ευθύνονται για αστοχίες σε επίπεδο πυριτίου και επιδεινώνουν την αξιοπιστία του συστήματος. Η ενδελεχής μελέτη της υπάρχουσας βιβλιογραφίας στον τομέα της αξιοπιστίας συστημάτων είναι σημαντική και για την εμπέδωση των σύγχρονων προσεγγίσεων και μεθόδωνελέγχου της αξιοπιστίας. Πιο συγκεκριμένα, θα μελετηθεί το ερευνητικό πεδίο της παραμετρικής αξιοπιστίας, δηλαδή οι τεχνικές προστασίας του συστήματος από ακραίες διακυμάνσεις των παραμέτρων λειτουργίας, ειδικά σε σχέση με τις χρονικές απαιτήσεις.Στη συνέχεια θα παρουσιαστεί ένα ρεαλιστικό σενάριο ενός PID ελεγκτή κλειστού βρόχου για τον περιορισμό της διακύμανσης επίδοσης μέσω μιας αντιδραστικής απόκρισης DVFS. Η ιδέα αυτή έχει μελετηθεί αλλά μόνο σε μικρή κλίμακα πιο συγκεκριμένα, η ενσωμάτωση της σε μια ολοκληρωμένη πλατφόρμα και η επέκτασή της για τη διαχείριση δυναμικού φόρτου εργασίας δεν έχει εξετασθεί. Το μοντέλο αυτό θα συγκριθεί ως προς κατανάλωση ενέργειας και χρονική απόκριση με το μοντέλο βάσης ενός ελεγκτή συχνότητας του λειτουργικού Linux. Επιπλέον θα προταθεί μια διαφοροποιημένη εκδοχή του μοντέλου για τη διαχείριση θερμότητας. Ο ελεγκτής αυτός υλοποιείται και πάλι με πραγματικό υλικό και παρουσιάζεται με ένα ρεαλιστικό σενάριο.Τελικώς, προτείνονται προληπτικοί χειρισμοί DVFS σε επίπεδο thread node, με χρήση δυναμικών σεναρίων για χρονικές εγγυήσεις με οικονομικά αποδοτικό τρόπο. Αξιοποιώντας τη μερική προβλεψιμότητα της συμπεριφοράς κάθε εφαρμογής, αναπτύσσεται μια προσέγγιση δυναμικών σεναρίων και καθίσταται εφικτή η λήψη οικονομικά αποδοτικών αποφάσεων DVFS. Τα αποτελέσματατης προσομοίωσης επιτυγχάνουν σημαντικά ενεργειακά οφέλη σε σχέση με προηγούμενες μεθόδους ελέγχου συχνότητας, ενώ τα πειραματικά αποτελέσματα της υλοποιηθείσας διάταξης καταδεικνύουν την αποτελεσματικότητα του προτεινόμενου μοντέλου
Going Beyond Counting First Authors in Author Co-citation Analysis
The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
We provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Dispelling the Myths Behind First-author Citation Counts
We conducted a full-scale evaluative citation analysis study of scholars in the XML research field to explore just how different from each other author rankings resulting from different citation counting methods actually are, and to demonstrate the capability of emerging data and tools on the Web in supporting more realistic citation counting methods. Our results contest some common arguments for the continued
use of first-author citation counts in the evaluation of scholars, such as high correlations between author rankings by first-author citation counts and other citation
counting methods, and high costs of using more realistic citation counting methods that are not well-supported by the ISI databases. It is argued that increasingly available digital full text research papers make it possible for citation analysis studies to go beyond what the ISI databases have directly supported and to employ more
sophisticated methods
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