24 research outputs found
An investigation into adaptive power reduction techniques for neural hardware
No full textIn light of the growing applicability of Artificial Neural Network (ANN) in the signal processing field [1] and the present thrust of the semiconductor industry towards low-power SOCs for mobile devices [2], the power consumption of ANN hardware has become a very important implementation issue. Adaptability is a powerful and useful feature of neural networks. All current approaches for low-power ANN hardware techniques are ‘non-adaptive’ with respect to the power consumption of the network (i.e. power-reduction is not an objective of the adaptation/learning process). In the research work presented in this thesis, investigations on possible adaptive power reduction techniques have been carried out, which attempt to exploit the adaptability of neural networks in order to reduce the power consumption. Three separate approaches for such adaptive power reduction are proposed: adaptation of size, adaptation of network weights and adaptation of calculation precision. Initial case studies exhibit promising results with significant power reduction
Power Aware Learning for Class AB Analogue VLSI Neural Network
No full textRecent research into Artificial Neural Networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumption of ANN hardware is a very significant implementation issue. This paper proposes a learning mechanism suitable for low-power class AB type analogue ANN that not only tunes the network to obtain minimum error, but also adaptively learns to reduce power consumption. Our experiments show substantial reductions in the power budget (30% to 50%) for a variety of example networks as a result of our power-aware learning
Power scalable implementation of artificial neural networks
No full textAs the use of Artificial Neural Network (ANN) in mobile embedded devices gets more pervasive, power consumption of ANN hardware is becoming a major limiting factor. Although considerable research efforts are now directed towards low-power implementations of ANN, the issue of dynamic power scalability of the implemented design has been largely overlooked. In this paper, we discuss the motivation and basic principles for implementing power scaling in ANN Hardware. With the help of a simple example, we demonstrate how power scaling can be achieved with dynamic pruning techniques
Behavioral Simulation of Biological Neuron Systems in SystemC
No full textThe investigation of neuron structures is an incredibly difficult and complex task that yields relatively low rewards in terms of information from biological forms (either animals or tissue). The structures and connectivity of even the simplest invertebrates are almost impossible to establish with standard laboratory techniques. Recent work has shown how a simplified behavioural approach to modeling neurons can allow “virtual” experiments to be carried out that map the behaviour of a simulated structure onto a hypothetical biological one, with correlation of behaviour rather than underlying connectivity. The problems with such approaches are twofold. The first is the difficulty of simulating realistic aggregates efficiently, and the second is making sense of the results. In this paper we describe a method of modeling neuron aggregates using SystemC (a language developed for hardware design), and also a design interface to enable structures and connection maps to be developed, with simulations carried out leading to animated visualization of the result
Sankalp Patra 2019 - the Key Highlights of BJP's Election Manifesto
No full textOn April 8, 2019, India's Bharatiya Janata Party (BJP) released its election manifesto called Sankalp Patra', 3 days ahead of the crucial General Elections. The theme of the manifesto is "Sankalpit Bharat - Shashakt Bharat" or "determined India, empowered India". Through this manifesto, the party has set up a target to make India a US 10 trillion economy by 2032.In the last general election held in the year 2014, BJP won 282 seats, leading the NDA to a tally of 336 seats in the 543-seat Lok Sabha - the lower house of Indian Parliament. Eventually, it formed the government under the leadership of Narendra Modi. 
Global optimization using a deflation-based method for the design of composite structures
No full textComposite structures are rapidly transforming the aerospace industry, driven by continuous advancements in manufacturing methods capable of producing optimized structures with variable stiffness that enables the creation of increasingly complex and efficient structures. This project focuses on the development of a global optimization method that applies the innovative concept of deflation to the design of optimized composite structures.This project aims at developing a method for global optimization by applying the concept of deflation for the design of optimized composite structures. Gradient-based optimization is known for its accuracy in identifying local optima, although heavily depends on initial starting points in non-convex design spaces. By incorporating deflation, gradient-based optimizers can obtain multiple local optima even when starting from the same point in the design space. This approach not only offers alternate minima for assessing design feasibility but also highlights the importance of having a universally applicable method for existing optimization schemes. The methodology herein proposed establishes a gradient-based optimization framework that is used to develop and test the developed deflation constraint. The novel deflation constraint can be integrated into any optimization method supporting constrained optimization, either gradient-based or heuristics-based. The developed deflation method is tested on various case studies related to composite structure optimization, showcasing its promising applications in the aerospace industry and beyond.Aerospace Engineering | Structures and Material
Efficiency improvement of Doherty power amplifiers using supply switching and gate bias modulation
No full textAgnostiqHQ/covalent: v0.234.1-rc.0
No full text<h2>[0.234.1-rc.0] - 2024-05-10</h2>
<h3>Authors</h3>
<ul>
<li>Andrew S. Rosen <a href="mailto:[email protected]">[email protected]</a></li>
<li>Sankalp Sanand <a href="mailto:[email protected]">[email protected]</a></li>
<li>Co-authored-by: Alejandro Esquivel <a href="mailto:[email protected]">[email protected]</a></li>
<li>Casey Jao <a href="mailto:[email protected]">[email protected]</a></li>
<li>Co-authored-by: Santosh kumar <a href="mailto:[email protected]">[email protected]</a></li>
</ul>
<h3>Fixed</h3>
<ul>
<li>Sublattice electron function strings are now parsed correctly</li>
<li>The keys of dictionary inputs to electrons no longer need be strings.</li>
<li>Fixed inaccuracies in task packing exposed by no longer uploading null attributes upon dispatch.</li>
</ul>
<h3>Operations</h3>
<ul>
<li>Fixed nightly workflow's calling of other workflows.</li>
<li>Fixed input values for other workflows in <code>nightly-tests</code> workflow.</li>
</ul>
<h3>Operations</h3>
<ul>
<li>Removing author email from changelog action</li>
<li>Fixed nightly worfkflow's calling of other workflows.</li>
</ul>
