42 research outputs found

    Performance of FBK SiPMs coupled to PETA3 read-out ASIC for PET application

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    In this paper we show the energy and timing resolution performances of FBK SiPMs coupled to the PETA3 ASIC for PET application. We developed a measurement set-up to characterize single SiPMs coupled to scintillator exploiting the detector stack developed within the HYPERImage project. In this way we are able to characterize the combined SiPM/ASIC performance with the same signal chain (from the sensor to the ASIC board) used in the PET system. We show that using two scintillator detectors, composed of a 3x3x5mm^3 LYSO crystal coupled to a 3x3mm^2 SiPM, an intra-stack CRT of about 200ps FWHM can be obtained

    A Compact, Water Cooled, 144-Channel Photo Sensor Module For γ Detection In PET

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    We present a very compact photo sensor module with an area of 32.8x32.0mm^2 containing 12x12 Silicon Photomultipliers (SiPMs) in a pitch of (2.5mm)^2. The readout of the 144 channels is done by highly specialized PETA5 ASICs (Position Energy Timing Asic) which offer self triggered hit detection (including neighbor logic and fast veto mechanisms), time stamping with 50ps bin width and digital amplitude measurement. The module uses a substrate which is cooled by a fluid running in internal channels. The SiPMs are glued and wire bonded in a regular pattern on the top side, the ASICs are flip chip mounted at the bottom side. Several modules will be plugged into a control and data readout PCB. The full height of these parts is below 1cm. The module can be used to read scintillator crystal arrays with a pitch of only 2.5mm in a 1:1 coupling, or smaller crystals with light spreaders. We present the module design and the first results obtained with 1:1 coupled LYSO crystal arrays

    Compact SiPM based Detector Module for Time-of-Flight PET/MR

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    We present a compact detector module for gamma detection in the PET part of a simultaneous ToF-PET/MR system. The module covers an area of 3.3cm x 3.3cm with 64 SiPM based readout channels. It is composed of a stack of three PCBs of identical size: The SiPMs on the topmost PCB are read out by two full-custom ASICs located on a second PCB located underneath. A third PCB at the bottom of the stack contains a local voltage regulator, an FPGA for ASIC control and data processing, and DACs to generate bias voltages for the readout ASICs and the SiPM devices. An LYSO scintillator block is optically coupled to the SiPMs for gamma to light conversion

    Development and Test of a High Performance Multi Channel Readout System on a Chip with Application in PET/MR

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    The availability of new, compact, magnetic field tolerant sensors suitable for PET has opened the opportunity to build highly integrated PET scanners that can be included in commercial MR scanners. This combination has long been expected to have big advantages over existing systems combining PET and CT. This thesis describes my work towards building a highly integrated readout ASIC for application in PET/MR within the framework of the HYPERImage and SUBLIMA projects. It also gives a brief introduction into both PET and MR to understand the unique challenges for the readout system caused by each system, and their combination. A number of typical solutions for different requirements of the ASIC - timing measurements, trigger generation, and energy readout - and contemporary readout systems are presented to put our system in context. Detailed measurements have been performed to evaluate the performance of the ASIC, and the setup and results are presented here

    PETAT -- An ASIC for Simple and Efficient Readout of Large PET Scanners

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    Modern PET scanners based on scintillating crystals use solid state photo detectors for light readout. The small area of these devices is beneficial for spatial resolution, but also leads to a large number of electronic channels to be read out, mostly by application specific integrated circuits (ASICs) containing amplification, noise reduction, hit finding, time stamping and amplitude measurement. Although each ASIC provides up to 64\approx 64 channels, a large number of chips is required with the need for auxiliary electronic components like voltage regulators or FPGAs for control and data readout. The FPGAs in turn often require multiple supply voltages and configuration infrastructure, so that PCBs get complicated, cumbersome and power-hungry, in addition to the significant power requirement of the front-end ASICs. We address this issue in the latest generation of our PETA readout ASIC for SiPMs by a simplified control scheme and, in particular, by a hierarchical serial data readout which does not require any additional FPGA. In addition, it provides a time-sorted stream of hit data, allowing early on-detector data reduction and hit pre-processing like the removal of hits with no coincident partner. The simplicity of this readout facilitates a supply scheme where power/ground of multiple ASICs are connected in series instead of the standard parallel connection. This \u27serial-powering\u27 approach can reduce supply current (while increasing overall supply voltage) so that voltage drop issues in the supply are alleviated.Contribution to the PETTECH23 Workshop on PET Electronics & Technologies, 12-13.9.2023, Fraunhofer IMS, Duisburg, German
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