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    3 research outputs found

    Architecture and Hardware Design of a Dual-Execution mode Processor Based on Produced Order Queue Execution Model

    Author
    1. Md Musfiquzzaman Akanda
    Publication venue
    Publication date
    24/03/2008
    Field of study
    No full text
    電気通信大学博士(工学)2007thesi
    C-RECS (Creative Repository of Electro-Communications)

    On the Design of a Dual-Execution Modes Processor: Architecture and Preliminary Evaluation

    Author
    1. Md. Musfiquzzaman Akanda
    2. Ben A. Abderazek
    3. Masahiro Sowa
    Publication venue
    Publication date
    2006
    Field of study
    No full text
    Crossref

    An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture

    Author
    1. Sotaro Kawata
    2. Ben A. Abderazek
    3. Akanda Md. Musfiquzzaman
    4. Masahiro Sowa
    Publication venue
    Publication date
    2005
    Field of study
    No full text
    Crossref
    corecore

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