6,787 research outputs found
Vascular endothelial growth factor restores delayed tumor progression in tumors depleted of macrophages
Genetic depletion of macrophages in Polyoma Middle T oncoprotein (PyMT)-induced mammary tumors in mice delayed the angiogenic switch and the progression to malignancy. To determine whether vascular endothelial growth factor A (VEGF-A) produced by tumor-associated macrophages regulated the onset of the angiogenic switch, a genetic approach was used to restore expression of VEGF-A into tumors at the benign stages. This stimulated formation of a high-density vessel network and in macrophage-depleted mice, was followed by accelerated tumor progression. The expression of VEGF-A led to a massive infiltration into the tumor of leukocytes that were mostly macrophages. This study suggests that macrophage-produced VEGF regulates malignant progression through stimulating tumor angiogenesis, leukocytic infiltration and tumor cell invasion
Measurement of benzylmercapturic acid in human urine by liquid chromatography-electrospray ionization-tandem quadrupole mass spectrometry
Business Model Innovation of JF Logistics Company
摘要 随着全球化经济的发展,市场竞争变得越来越复杂。信息时代使得物流供应链管理已上升到企业的战略管理高度。在这样的背景下,本文应用翁君奕老师的介观商务模式创新观点,对JF物流公司所处行业现状进行剖析,重新审视了外部客户市场以及内部自身情况,找出了JF物流公司自身的优势,并结合外部市场客户的需求,提出了“为客户提供个性化的集物流、资金流、信息流于一体的供应链物流服务”这一价值主张,并在此基础上,重新定位客户市场,创新服务产品,理顺内部管理架构和业务流程以支撑和保持这一价值主张。文中同时以例证来说明依据新价值主张所创新的服务产品给JF物流公司所带来的变化,以此说明通过商务模式创新来实行自身的战略...Abstract With the development of the global economy, the competition in market becomes more complicated. In the era of information, logistics and supply chain management is regarded as important as part of the company strategy. Under such background , the author of this essay uses the concept of “JieGuan Business Model Innovation” proposed by Professor Weng Junyi of Xiamen University, and analy...学位:管理学硕士院系专业:管理学院高级经理教育中心(EMBA项目)_管理经济学学号:X200615614
MINIATURE 1.87-dB INSERTION-LOSS V-BAND CMOS BANDPASS FILTER WITH TWO ENHANCED FINITE TRANSMISSION ZEROS
[[abstract]]In this article, we demonstrate a miniature low-insertion-loss V-band bandpass filter with two finite transmission zeros by standard 0.13-mu m CMOS technology. The proposed filter architecture has the following feature: the low-frequency transmission-zero and the high-frequency transmission-zero can be tuned by the series-feedback capacitor C(s) and the parallel-feedback capacitor C(p), respectively. Parallel LC circuits (i.e.. C(12) in parallel with L(C1)-C(11)-L(C2) and C(22) in Parallel with L(C3)-C(21)-L(C4)) are used for implementing C(1) and C(2) to improve the roll-off characteristic at high frequency and the depth of the upper notch. Besides, low-insertion-loss was achieved by adopting thick microstrip-line (MSL) with optimized ground-plane pattern as the needed inductors to minimize both the metal loss and the substrate loss. Over the frequency range of 49.5-82.5 GHz, the filter achieved insertion-loss (1/S(21)) lower than 3 dB, and input return loss (S(11)) and output return loss (S(22)) better than -10 dB. The minimum insertion-loss was 1.87 dB at 66.5 GHz, a state-of-the-art result for a V-band CMOS bandpass filter. The chip area was only 0.466 x 0.307 mm(2), i.e., 0.143 mm(2), excluding the test pads. (C) 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1830-1836, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25302[[note]]SC
DESIGN AND IMPLEMENTATION OF A HIGH-PERFORMANCE V-BAND CMOS BANDPASS FILTER
[[abstract]]In this article, we demonstrate a low-insertion-loss V-band (50-75 GHz) bandpass filter with two finite transmission zeros by standard 0.13 mu m CMOS technology. The proposed filter architecture has the following feature: the low-frequency transmission-zero and the high-frequency transmission-zero can be tuned by the series-feedback capacitor C(s) and the parallel-feedback capacitor C(p) respectively. Besides, low-insertion-loss is achieved by adopting thick microstrip-line (MSL) with optimized ground-plane pattern as the needed inductors to minimize the metal and substrate loss. This filter achieved insertion-loss (1/S(21)) lower than 3 dB m,er the frequency range of 52.2-76.7 GHz. input return loss (S(11)) better than -10 dB over the frequency range of 50.2-80.6 GHz, and output return loss (S(22)) better than -10 dB over the frequency range of 50.2-77.3 GHz. The minimum insertion-loss was 2.18 dB at 63.5 GHz, an excellent result for a V-band CMOS bandpass filter. The chip area was only 0,466 x 0.307 mm(2), i.e., 0.143 mm(2), excluding the rest pads. (C) 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 309-316, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24935[[note]]SC
3-11 GHz low-power, low-noise CMOS distributed amplifier using splitting-load inductive peaking and noise-suppression techniques
[[abstract]]A CMOS distributed amplifier (DA) with. at and low noise figure (NF), and. at and high gain (S(21)) is demonstrated. A. at and low NF was achieved by adopting a RL terminating network for the gate transmission line, and a slightly under-damped Q-factor for the second-order NF response. Besides, flat and high S(21) was achieved using the proposed cascade gain cell, which constitutes a cascode-stage with a low-Q RLC load and a splitting-load inductive-peaking inverter stage. In the high-gain (HG) mode, the DA consumed 27.6 mW and achieved S(21) of 17.5 +/- 1.23 dB with an average NF of 3.24 dB over the 3 - 10 GHz band, one of the best reported NF performances for a CMOS UWB DA or LNA in the literature. The measured IIP3 was 2.1 dBm (at 8 GHz). In the low-gain (LG) mode, the DA achieved S(21) of 10.74 +/- 1.2 dB and an average NF of 4.67 dB with a low power dissipation of 9 mW.[[note]]SC
DC similar to 10.5 GHz complimentary metal oxide semiconductor distributed amplifier with RC gate terminal network for ultra-wideband pulse radio systems
[[abstract]]A DC similar to 10.5 GHz complimentary metal oxide semiconductor (CMOS) distributed amplifier (DA) with flat and low noise figure (NF), flat and high power gain (S-21) and small group delay (GD) variation for ultra-wideband (UWB) pulse radio systems using standard 0.18 mu m CMOS technology is demonstrated. Flat and low NF was achieved by adopting the proposed resistor capacitor (RC) terminal network with 140 Omega terminal resistance over the frequency band of interest (instead of the traditional 50 Omega terminal resistance or the recently proposed resistor inductor (RL) terminal network) for the gate transmission line. Besides, flat and high S-21 was achieved by using cascoded transistors as the gain cell. Over the DC similar to 10.5 GHz band, the DA consumed 29.16 mW and achieved flat and high vertical bar S-21 vertical bar of 10.5 +/- 1.4 dB, flat and low NF of 3.2 +/- 0.3 dB and excellent phase linearity (the GD variation was only +/- 13.8 ps), one of the best NF and phase linearity results ever reported for a CMOS DA or wideband low-noise amplifier (LNA) with bandwidth greater than 7.5 GHz.[[note]]SC
0.99 mW 3-11 GHz common-gate CMOS UWB LNA using T-match input network and self-body-bias technique
[[abstract]]A low-power 3-10 GHz common-gate CMOS ultra-wideband (UWB) low-noise amplifier (LNA) using a T-match input network and the selfbody- bias technique is demonstrated. Wideband input impedance matching was achieved by using the proposed T-match input network to improve the input matching at low frequencies. A low supply voltage of 1.1 V (for two V(DS) drops) was achieved by using the self-body-bias technique to reduce the threshold voltage (V(th)) of the transistors, which leads to a low power consumption (P(D)). At V(G) = 0.77 V, the LNA consumed 2.15 mW and achieved S(11) of -10.4 to -35.5 dB, S(21) of 10.4 dB, and an average NF of 4.9 dB over the 3-10 GHz band of interest. At V(G) = 0.63 V, the LNA consumed 0.99 mW and achieved S(11) of -10.7 to -35.8 dB, S(21) of 7.9 dB and an average NF of 6 dB. Both are the lowest P(D) ever reported for an UWB CMOS LNA with bandwidth greater than 6 GHz.[[note]]SC
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