49,643 research outputs found
Fig. 2. Key HMBC and 1H–1H COSY correlations for 1–3 and 5 in Triterpene glycosides and phenylpropane derivatives from Staurogyne concinnula possessing anti-angiogenic activity
No full textFig. 2. Key HMBC and 1H–1H COSY correlations for 1–3 and 5.Published as part of Vo, Thanh-Hoa, Lin, Yu-Chi, Liaw, Chia-Ching, Pan, Wen-Pin, Cheng, Jing-Jy, Lee, Ching-Kuo & Kuo, Yao-Haur, 2021, Triterpene glycosides and phenylpropane derivatives from Staurogyne concinnula possessing anti-angiogenic activity, pp. 1-9 in Phytochemistry (112666) 184 on page 5, DOI: 10.1016/j.phytochem.2021.112666, http://zenodo.org/record/829216
Fig. 5 in Triterpene glycosides and phenylpropane derivatives from Staurogyne concinnula possessing anti-angiogenic activity
No full textFig. 5. Inhibition of FAK/paxillin/MMP signaling pathway treated with 4.Published as part of Vo, Thanh-Hoa, Lin, Yu-Chi, Liaw, Chia-Ching, Pan, Wen-Pin, Cheng, Jing-Jy, Lee, Ching-Kuo & Kuo, Yao-Haur, 2021, Triterpene glycosides and phenylpropane derivatives from Staurogyne concinnula possessing anti-angiogenic activity, pp. 1-9 in Phytochemistry (112666) 184 on page 8, DOI: 10.1016/j.phytochem.2021.112666, http://zenodo.org/record/829216
Research of CMOS Microwave and Millimeter-wave Power Amplifier
No full text在本論文中，我們設計並實現了三個利用金氧半場效電晶體(CMOS)製程之功率放大器。此論文分為三個部份，第一部分介紹了在金氧半場效電晶體(CMOS)製程的功率放大器設計考量，以及一些功率放大器的基本原理。第二部份中，設計了第一個功率放大器使用標準0.18-微米CMOS製程，此設計的最大困難是其崩潰電壓僅為1.8 V。我們使用適當的匹配電路設計達到良好的輸出功率及小訊號增益。此功率放大器經由量測可得在24 GHz，輸出功率為19.1 dBm，小訊號增益為18.8 dB，晶片面積僅有0.56 x 0.58平方毫米。第三部分，我們設計並量測了兩個應用於60 GHz之系統的功率放大器。兩者皆使用薄膜微帶傳輸線作為匹配元件，以減低損耗性基板對被動元件的影響。第一個功率放大器使用0.13-微米CMOS製程，由量測結果顯示，當VDD偏壓在3V時，此功率放大器由量測可得在55 GHz，飽和輸出功率為14.3 dBm，輸出功率1-dB功率壓縮點 (P1dB)為11.2 dBm，功率附加效率(PAE)為8 %，小訊號增益為15.5 dB且面積只有0.65 x 0.5平方毫米。第二個功率放大器則使用較先進的90奈米CMOS製程。此電路設計具有寬頻的響應以增加對製程變異性的容忍度，3-dB頻寬從50-70 GHz且面積只有0.66 x 0.5平方毫米，量測結果顯示，當VDD偏壓在2.4 V時，此功率放大器由量測可得在60 GHz，飽和輸出功率為16.2 dBm，輸出功率1-dB功率壓縮點(P1dB)為12 dBm，功率附加效率(PAE)為15 %，小訊號增益為33 dB。三個電路皆顯示了模擬及量測的一致性，而且三者的輸出功率皆優於目前相近頻帶已發表之金氧半場效電晶體(CMOS)功率放大器，顯示出金氧半場效電晶體(CMOS)製程於高頻功率應用的潛力。The goal of the thesis is to design and implement three power amplifiers (PAs) in CMOS process. The thesis consists of three parts. The first part introduces the basic of power amplifier theory, then introduces the design consideration and the design challenge of the CMOS power amplifier. n the second part, the first PA is implemented in a standard 0.18-μm CMOS technology. The major challenge of this circuit is that the breakdown voltage is about 1.8 V. Proper design of matching networks leads to good power and gain performances. The measured output power is 19.1 dBm and the small signal gain is 18.8 dB at 24 GHz. The chip size is only 0.56 x 0.58 mm2. n the third part, two PAs are designed and measured for 60 GHz systems. Thin-film microstrip lines (TFMS) used as matching elements to reduce the effect of lossy substrate on these two circuits. The first PA fabricated in 0.13-μm CMOS process. This PA achieves a measurement Psat of 14.3 dBm, P1dB of 11.2 dBm, PAE of 8 %, and linear gain of 15.5 dB at the frequency of 55 GHz, with a chip size of 0.66 x 0.5 mm2, when VDD is biased at 3 V. The second PA fabricated in a more advanced 90-nm CMOS process. The circuit is designed to have a wide-band frequency response to tolerate process variation. The MMIC PA has a wide 3-dB bandwidth from 50 to 70 GHz, with a chip size of 0.66 x 0.5 mm2. When VDD is biased at 2.4 V, this PA achieves a measurement Psat of 16.2 dBm, P1dB of 12 dBm, PAE of 15 %, and linear gain of 33 dB at the frequency of 60 GHz.The simulations agree with the measurements very well in these PAs, also, three PAs demonstrated high output power compared with the previously works of CMOS PAs operating at frequencies around 24 GHz and 60 GHz.CONTENTS謝 i文摘要 iiBSTRACT ivONTENTS viIST OF FIGURES viiiIST OF TABLES xiihapter 1 Introduction 1.1 Background and Motivation [1] 1.2 Literature Survey of High Frequency CMOS Power Amplifiers 3.3 Contributions 4.4 Thesis Organization 5hapter 2 Overview of Power Amplifier Design 6.1 Introduction 6.2 Design Challenges of CMOS Power Amplifiers 6.3 Power Amplifier Theory [13]-[15] 8.4 Design Considerations of Power Amplifiers 15hapter 3 A 24 GHz Power Amplifier Using 0.18-μm CMOS Technology 18.1 Introduction 18.2 Previously Published Works 19.3 Design a 24 GHz PA using 0.18-μm CMOS Process 21.4 Measurement Results 29.5 Conclusions 34hapter 4 V-Band CMOS Power Amplifier Design 37.1 Introduction 37.2 Design a 60 GHz PA using 0.13-μm CMOS Process 39.3 Measurement Results of 0.13-μm CMOS 60 GHz PA 46.4 Design a 60 GHz PA using 90-nm CMOS Process 52.5 Measurement Results of 90-nm CMOS 60 GHz PA 59.6 Conclusions 66hapter 5 Conclusions 69EFERENCE 71UBLICATION LIST OF JING-LIN KUO 76ournal Papers 76onference Papers 7
Dr. Lin Sun, CAU, March 2013
No full textThis video is a conversation with Dr. Lin Sun. Dr. Sun talks about an exhibit at the Woodruff Library titled "At The Boundary." Jordan Moore, AUC Woodruff Library, is the interviewer
60-GHz Phased Array System for Wireless Communications
No full text本研究使用65奈米CMOS製程研發60-GHz四單元相位陣列天線收發器之系統封裝 (system in package，SiP) 模組。此系統包含功率放大器 (power amplifier，PA)、可變增益低雜訊放大器 (variable gain low noise amplifier，VGLNA)、4:1威爾金森功率分/合網路 (Wilkinson power combining/dividing network)、四位元切換型相移器 (switching type phase shifters，STPS)、相位補償之可變增益放大器 (variable gain amplifier，VGA)、數位控制介面(digital control interface，DCI)、六位元數位類比轉換器 (digital-to-analog converter，DAC)、靜電放電(electrostatic discharge，ESD)保護電路以及偏壓電路(bias circuit)。收發晶片使用覆晶技術直接黏著於低溫共燒陶瓷(low temperature co-fired ceramic，LTCC)基板上，並以填底 (underfill) 材料加強封裝結構。此SiP模組可直接使用錫球或鎊線組裝於印刷電路板 (printed circuit board, PCB)上使用。從天線饋入端至晶片輸出入端RF訊號傳輸路徑經由適當的分析與設計，可有效降底整體傳輸路徑的損耗，同時亦可大幅提升工作頻寬。而天線陣列則直接做在模組與晶片相接的另外一面，使用了空腔負載的結構使得天線單元的頻寬可以超過20%，並以連通柱為基礎的皺褶(corrugated)結構降低天線單元間的耦合至-15 dB以下。
此2x2收發相位陣列與四個天線單元構裝於低溫共燒陶瓷(low temperature co-fired ceramic，LTCC)模組中，並成功展示波束切換之功能，此波束切換功能可完全由數位控制介面控制。四單元發射機(transmitter, Tx)陣列每通道之P1dB為5 dBm；四單元接收陣列每通道之平均增益則為25 dB。Tx陣列使用1 V電源，功耗為400 mW，接收機(receiver, Rx)陣列使用1.8 V及1 V電源，功耗則為180 mW。Rx及Tx晶片分別使用3.74 mm2及4.18 mm2之面積。模擬與量測一致性良好。就吾人所知，此為V頻段第一個不需高/低頻轉換器(up/down converter)而能直接量測相位陣列系統場型之量測結果。The 60-GHz 4-element phased-array transmit/receive (TX/RX) system-in-package (SiP) antenna modules in 65nm CMOS technology are presented. The design is based on the all-RF architecture with power amplifier (PA), variable gain low noise amplifier (VGLNA), 4:1 Wilkinson power combining/ dividing (PC/PD) network, 4-bits RF switching type phase shifters (STPS), phase compensated variable gain amplifier (VGA), digital control interface (DCI), 6-bits unary digital-to-analog converter (DAC), electrostatic discharge (ESD) protection, and bias circuit. The 2x2 TX/RX phased arrays have been packaged with 4 antennas in a low temperature co-fired ceramic (LTCC) module. The 60-GHz SiP module packaging technology has also been developed. The Tx/Rx ICs are bonded onto low temperature co-fired ceramic substrates through flip-chip bonding and underfill process, which can be assembled onto printed circuit boards with bond wires or solder balls for further usage. Electrical characteristics of the RF signal traces from IC to antenna array are investigated to lower the transmission loss. The antenna array is designed on the other side opposite to the flipped chip side, by using the backed cavity to achieve more than 20% bandwidth and high isolation. The mutual coupling of antenna elements is reduced by incorporating the via-based corrugation between antenna elements and the interleaved topology for the array layout. The measured couplings of adjacent elements were below -15 dB.
The entire 2x2 beam steering functions are digitally controllable, and the individual registers are integrated at each front-end to enable beam steering through the DCI. The four-element TX array results in an output P1dB of 5 dBm per channel. The four-element RX array results in an average gain of 25 dB per channel. The four-element array consumes 400 mW in the TX from 1-V supply voltage and 180 mW in the RX from 1.8-V and 1-V supply voltage, and occupies an area of 3.74 mm2 in TX IC and 4.18 mm2 in RX IC. Good agreement between simulated and measured array pattern is demonstrated. To the author’s knowledge, this is the first demonstration of on-wafer V-band phased array system pattern measurement without the up/down converter
Identification and Sequence Analysis of an DNA Fragment Involved in Site-specific Recombination of Filamentous Cf1t
No full textAn Analysis of <i>Judge Lin</i>
No full textBiography of Lin Wen Zhong Gong has another way to call, that is Judge Lin. The leading character is Lin Ze-Xu. This book is based on functionary experience of Lin Ze-Xu, with the captivating plots of court case, helping by highly skilled military attach\uc3\ua9s and chivalrous knights, and the history facts of Opium War. It makes Lin Ze-Xu\ue2s Confucian temperament and tragic mood more, also contrasts with author\ue2s sorrow and furiousness for the politics at the time. History, court case, martial arts\ue2\ua6\ue2\ua6etc. are essence of this book and it broadens the way of this writing style.
The topic of the thesis is \ue2An Analysis of Judge Lin\ue2. The following thesis will be divided into six different chapters. The introduction is Chapter one of the thesis, which is including researching motive and purpose, literature review of predecessors, researching version by existing information, raising questions, choosing research methods and arranging chapters. In chapter Two, I discuss the study of characters of Lin Ze-Xu, also makes a deep analysis of author\u27s purpose of writing him. In chapter Three, I analyze supporting actors and actress. Meanwhile, I illustrate author\u27s purpose of writing supporting actress because the author had different manner to describe supporting actress. Moving to the Chapter Four, I mainly focus on the plots of Judge Lin, and organize cases of Lin Ze-Xu and his subordinates to understand features of cases. In Chapter Five, I represent the causes of Opium War. China and England had difference of opinions of opium. Therefore, it is easier to comprehend what the author\u27s purpose is. In the last chapter I summarize the main points of the preceding chapters and confirm particularity of Judge Lin
The music idea, music aesthetics and writing skills of the composition JING.
No full textAbstract
This thesis discusses the music idea, music aesthetics and writing skills of the author\ue2s composition JING. The music idea and aesthetics of the JING are inspired by Confucianism, Buddhism and Taoism. The common important issue that these three isms concern about and also the point inspires the author is Nature. The author uses Repetition as the music writing skills to represent the constancy of the nature. In other words, music repetition and the variation of the repetition is what the author wants to experiment in the composition JING. In order to learn how the repetition used and represents the Nature in the three isms, the author also studies and analyzes important ritual music for the rites of Confucianism, Buddhism and Taoism. Furthermore the author discusses how repetition works and means in western music. Concluding the discussions on the three pieces of ritual music and the western music, the author comes out her own point of view which becomes the important material and creating process in JING.
JING is consisted of three movements. The first movement is JI, the second is ZHI, and the third is JIE. Although the three movements are titled differently, the points that the author wants to present are all the same and is about Constant Nature. The author experiments the skills of repetition in the piece throughout to show her intention for understanding Constancy of Nature
- …
