1,657 research outputs found

    The Pixel Detector of the ATLAS Experiment for LHC Run-2

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    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of LHC. Taking advantage of the long showdown, the detector was extracted from the experiment and brought to surface, to equip it with new service quarter panels, to repair modules and to ease installation of the Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 between the existing Pixel Detector and a new smaller radius beam-pipe at a radius of 3.3 cm. To cope with the high radiation and pixel occupancy due to the proximity to the interaction point, a new read-out chip and two different silicon sensor technologies (planar and 3D) have been developed. Furthermore, the physics performance will be improved through the reduction of pixel size while, targeting for a low material budget, a new mechanical support using lightweight staves and a CO2 based cooling system have been adopted. An overview of the refurbishing of the Pixel Detector and of the IBL project as well as the experience in its construction will be presented, focusing on adopted technologies, module and staves production,qualification of assembly procedure, integration of staves around the beam pipe and commissioning of the detector

    Development of 3D-DDTC pixel detectors for the ATLAS upgrade

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    We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are here discussed.We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are here discussed

    Integration and test of the ATLAS Semiconductor Tracker

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    The ATLAS Semiconductor Tracker (SCT) will be a central part of the tracking system of the ATLAS experiment and is one of the major new silicon detector systems for LHC. The paper summarizes the system integration of the SCT from individual components to the completed tracker barrel and endcaps ready for installation in the pit. Particular attention will be given to the test results obtained during the different integration steps: from single barrels and disks to the final tests inside the ID before installation in the pit. The tests provided us with operational experience for a significant fraction of the full detector system and showed the very good performance of the final assembled detector

    Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

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    The upgrade of the ATLAS (The ATLAS Collaboration, 2008) tracking detector for the High-Luminosity Large Hadron Collider (LHC) at CERN requires novel radiation hard silicon sensor technologies. Significant effort has been put into the development of monolithic CMOS sensors but it has been a challenge to combine a low capacitance of the sensing node with full depletion of the sensitive layer. Low capacitance brings fast signal response at low noise combined with low analog power. Depletion of the sensitive layer causes the signal charge to be collected by drift sufficiently fast to separate hits from consecutive bunch crossings (25 ns at the LHC) and to avoid losing the charge by trapping after irradiation. This paper focuses on the characterization of charge collection properties and detection efficiency of prototype sensors originally designed in the framework of the ALICE Inner Tracking System (ITS) upgrade. The prototypes are fabricated both in the standard TowerJazz 1 1 Manufactured by Tower Semiconductor Ltd, Israel. 180 nm CMOS imager process (Senyukov et al., 2013) and in an innovative modification of this process developed in collaboration with the foundry, aimed to fully deplete the sensitive epitaxial layer and enhance the tolerance to non-ionizing energy loss. Sensors fabricated in standard and modified process variants were characterized using radioactive sources, X-ray beam and test beams before and after irradiation. Contrary to sensors manufactured in the standard process, sensors from the modified process remain fully functional even after 1015^{15}neq_{eq} /cm2^2 which is the expected NIEL radiation fluence for the outer pixel layers in the future ATLAS Inner Tracker (ITk)

    Recent test results on the ATLAS SCT detector

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    The ATLAS Semiconductor Tracker (SCT) will be a central part of the tracking system of the ATLAS experiment. The SCT, which is currently under construction, will consist of four concentric barrels of silicon detectors as well as two silicon endcap detectors formed by nine disks each. After an overview of the SCT and the detector module layout, the paper will summarize recent test results obtained from silicon detector modules, which have been extensively tested before starting their large series production. The tests presented here cover electrical performance of individual modules, their performance after irradiation, as well as system tests in a multi-module setup

    The DELPHI silicon tracker

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    The DELPHI collaboration has upgraded the Silicon Vertex Detector in order to cope with the physics requirements for LEP200. The new detector consists of a barrel section with three layers of microstrip detectors and a forward extension made of hybrid pixel and large pitch strip detectors. The layout of the detector and the techniques used for the different parts of the new silicon detector shall be described

    Overview of the ATLAS Insertable B-Layer Pixel Detector

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    ATLAS currently develops a new pixel detector for the first upgrade of its tracking system: The ATLAS Insertable B-Layer Pixel detector (IBL). The new layer will be inserted between the inner most layer of the current pixel detector and a new beam pipe. The sensors are placed at a radius of 3.4cm. The expected high radiation levels and high hit occupancy require new developments for front-end chip and the sensor which can stand radiation levels beyond 5E15 neq/cm2. ATLAS has developed the new FEI4 and new silicon sensors to be used as pixel modules. Furthermore a new lightweight support and cooling structure was developed, which minimizes the overall radiation and allows detector cooling with CO2 at -40C coolant temperature. Currently the overall integration and installation procedure is being developed and test ready for installation in ATLAS in 2013. The presentation summarizes the current state of development of IBL modules, first preliminary test results of the new chip with new sensors, the construction of its pixel staves and overall support structure. It will conclude with an outline of the challenges for its installation in the present ATLAS detector system
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