1,720,963 research outputs found
Design of SiC-Si Hybrid Interleaved 3-Phase 5-Level E-Type Back-to-Back Converter
In modern applications, such as variable frequency electric drives, aircraft propulsion, electric vehicles, and uninterruptible power supply units, high power-dense, and efficient AC-AC power converters are the key to reducing power losses, thus limiting the overall costs, and improving the system's reliability. Power electronic equipment can be enhanced thanks to the continuous evolution of conversion topologies and advancements in power semiconductor technology. The design and the optimization strategy of the AC-AC 5-Level converter, called Interleaved 3-Phase 5-Level E-Type Back-to-Back Converter (I3Φ5L BTB E-Type Converter), has been proposed in this paper. The converter is analyzed and experimentally characterized to prove the configuration's high efficiency and high-power density. An introduction to the characteristics of the I-3Φ5L BTB E-Type Converter is described, and afterward, the optimization methodology to design the multilevel converter is presented. The converter prototype is illustrated, which achieves a peak efficiency of 98.2% and a total weight of 6.18 kg using hybrid technology for power semiconductor
Symmetrical three-phase seven-level E-type inverter for PV systems: Design and operation
Solar photovoltaic (PV) is one of the most favourable renewable energy types today, the use of which has grown throughout the world, and much more is expected in the future due to the continuous price drop. It is important to further develop renewable systems to generate green energy, which results in the reduction of air pollution and in enabling a future sustainable society for the next generation of people. Accordingly, new topologies of the multilevel converter have been proposed and investigated for PV applications to achieve high efficiency and high-power density. This study presents the analysis and design of the symmetrical three-phase E-type inverter (S-3Φ7L E-type). The proposed topology is directly derived from the T-type converter and exhibits seven voltage levels at the output offering interesting performance in terms of power semiconductors current and voltage stress. The hardware design process of the converter has been carried out to enhance the efficiency conversion. Finally, theoretical results are carefully verified by testing the converter prototype, featuring a peak efficiency of 99%
Li-Ion Battery Fast Charging Methods: Review and Comparison
In this paper a comprehensive review and analysis on fast charging methods for Li-Ion batteries is reported and assessment of their impact on battery performance addressed. Existing literature proposed and compared several pulse charging strategies, e.g., Positive Pulse Charging (PPC) and Sinusoidal Ripple Current (SRC), with the standard Constant Current Constant Voltage (CCCV) approach, asserting superior outcomes in term charging time, lifetime, and temperature rising. However, it is crucial to highlight that the Electric Vehicles (EVs) typically charge up to 80% to 90% State of Charge (SoC), leading to irrelevant contribution of the CV phase in terms of SoC but heavily contributing to the full charging time, therefore biasing the comparison. A comparative analysis of PPC, SRC against both Constant Current (CC) and CCCV charging methods based on past literatures data and tests is reported here, aiming at highlighting that PC does not significantly impact charging time as compared to CC charging. However, the advantages of PC, including extended battery lifetime, reduced capacity fade, and efficient charging, making it a promising option for the future e-mobility applications. Our evaluation considers several crucial parameters, namely charging time, temperature rise, lifetime, capacity fade, energy efficiency and charge efficiency. Additionally, we considered the practical implementation of pulsed charging strategies with respect to standard ones, considering the challenges and constraints in an actual battery charger. By addressing the feasibility and limitations, our research aims to provide valuable insights for the potential integration of pulsed charging into commercial EV charging infrastructure
Design Issues for Real-Time PMSM Power-Hadware-in the-Loop: Analysis at Switching Frequency
This paper focuses on the modelling of the current ripple in a Power-Hardware-in-the-Loop (PHIL) emulator of an isotropic Permanent Magnet Synchronous Machine (PMSM). In such applications, one of the main challenges is to replicate the current behavior when the inductance that is installed in the PHIL differs from that of the emulated machine. This is because the power emulator must emulate the current ripple at the switching frequency of the Device Under Test (DUT). A theoretical analysis is carried on deriving the equations that describe the current waveform in the PHIL. An expression for the current error between the PHIL system and the emulated one is derived and the parameters that affect the error are highlighted. Mathematical expressions for the control actions needed to bring the current error to zero are proposed and the technical limitations in their application are discussed. Simulation results confirm the effectiveness of the proposed analysis
Design of High-Power Density Interleaved 3-Phase 5-Level E-Type Back-to-Back Converter
This paper describes the design and the optimization of the Interleaved 3-Phase 5-Level E-Type Back-to-Back Converter (I-3F5L BTB E-Type Converter). In the proposed converter, the AC-AC conversion is developed through two parallel 5-level E-Type legs using intercell transformers. A brief introduction to the characteristics of the I-3F5L BTB E-Type Converter is given, the general analysis and the design optimization are presented. Furthermore, the hardware realization of the 20 kW 3F5L BTB E-Type Converter prototype is discussed, striving for the highest possible efficiency. The converter prototype is characterized by the total weight of 6.18 kg and the power density of 8.4kW/dm3. The experimental results validate the presented theoretical analysis
Self-Balancing 3-phase 5-Level Flying E-Type Inverter for Photovoltaic Applications
This paper proposes a 3-phase 5-Level Flying E-Type Topology for photovoltaic applications, the converter is able to balance the voltage across the flying capacitors thanks to the modulation technique. The flying capacitor voltages are self-balanced without using any additional balancing circuits or closed-loop controls. Operation modes and characteristics of the proposed converter are presented, as well the voltage balancing approach based on the sinusoidal pulse width modulation scheme is explained. The analysis of the proposed converter has been validated through the digital-switching model realized in Matlab/Simulink environment. Preliminary results show the effectiveness of the proposed converter to balance the DC-bus voltage. Experimental tests on the converter prototype are illustrated
Design Issues for a Real-Time PMSM Power-Hardware-in-the-Loop: Analysis at Fundamental Frequency
This paper deals with the design of an isotropic Permanent Magnet Synchronous Machine (PMSM) power emulator. Power emulators allow the emulation of physical systems to test a Device Under Test (DUT) at its rated power. During PMSM emulation, different electrical and mechanical characteristics must be replicated, such as the back-EMF, the resistive and inductive behavior, the inertia, and the friction coefficient. A power emulator is usually made of a switching converter and a coupling network. A coupling network is the combination of resistors, inductors and capacitors that allows the coupling of the DUT with the emulator switching power converter. In this paper, the analytical relation between the coupling network, the emulator DC bus voltage and the emulator operating range is derived. From the previous analysis a design procedure is obtained. The latter considers the constraint on the converter DC bus voltage, its effects on the coupling network sizing and on the machine operating range that can be emulated. Simulation results show the capability of the proposed method
Going Beyond Counting First Authors in Author Co-citation Analysis
The present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Low Voltage Stress 3-Phase 5-Level Multiceli E-Type Converter for Photovoltaic Applications
This paper proposes a 3-Phase 5-Level Multicell E-Type Converter (3Φ5L ME-Type) for medium-voltage applications. The proposed converter has each phase being accomplished by the combination of two I-Type cells connected to the Neutral Point Clamped (NPC) cell. The 3Φ5L ME-Type topology can improve the voltage stress of the power semiconductors, allowing to increase the DC-bus voltage. Operation modes and characteristics of the proposed converter are presented, and the theoretical investigation has been validated through the realized model in the Hardware-In-the-Loop (HIL) test bench. The performance of the proposed converter has been estimated through the created thermal model in Plexim/PLECS environment of the selected power semiconductors. The results show good performance and the effectiveness of the proposed converter to reduce the power semiconductor voltage stress compared to the previously E-Type Topology
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