1,720,999 research outputs found
Design issues and performance analysis of CCM boost converters with RHP zero mitigation via inductor current sensing
Full text linkThe right-half plane (RHP) zero in the control to output voltage transfer function of a boost converter operating in the continuous conduction mode limits the loop bandwidth. By injecting a scaled version of the inductor current into the loop, it is possible to shift the zero from the right-half plane to the left-half plane, which leads to increased stability of the control loop. This solution generates a static voltage error at the output of the converter (tracking error), which may be unacceptable in practical applications. A few strategies to mitigate or correct this tracking error have been suggested. However, they have never been fully assessed. This paper thoroughly investigates the impact of the RHP zero mitigation technique on the dynamic performance of a boost converter, and identifies the complex trade-off between the system stability, transient response, and tracking error correction capability. Based on these findings, design guidelines are provided to help maximize system performance. A representative case study is considered to highlight the performance benefits and simulation results are presented to validate the analysis
Novel Low-Cost Microstepping Driving Technique with Digital Current Estimation
No full textThis paper presents a new microstepping driving technique. The proposed approach exploits a digital current estimation algorithm and an integrator circuit to perform a 16 micro steps operation. The proposed solution allows, in an IC implementation, a consistent reduction of the silicon area compared to a conventional analog approach based on a 4 bit sinusoidal DAC. The presented control scheme was verified by experiments and an error analysis was performed
Integration of loop gain measurement circuit for stability evaluation in DC/DC converters with time-based control
No full textThe crossover frequency of DC/DC converters is related to some key dynamic performances such as line and load transient response. In integrated converters, its experimental measurement using standard techniques requires the connection to internal nodes of the controller that are not always accessible to the user. This paper presents a novel integrated loop gain measurement circuit for DC/DC converters with time-based control. The proposed circuit requires only two current-controlled delay lines, a transconductor, and two flip-flops that can be easily integrated with limited area occupation. An analytic description that relates the circuit parameters with the loop gain transfer function is provided along with some design rules for the transistor-level implementation. A prototype of the loop gain measurement circuit has been embedded in a DC/DC boost converter with time-based control designed in a BCD technology with 180 nm CMOS. The circuit has an area occupation of 0.027 mm2 with a current consumption of a few tens of mu A
Analysis of High-Performance Synchronous/Asynchronous digital control for dc-dc boost converters
No full textDigital Dead Time Auto-Tuning for Maximum Efficiency Operation of Isolated DC-DC Converters
No full textCommon-Gate Zero Current Detector with Body-Voltage Based Offset Compensation
No full textA zero-current-detector (ZCD) circuit is usually required in switching dc/dc converters to enable low current mode operations such as discontinuous-current-mode. The ZCD input offset arising from process variations and components mismatch makes the converter switch with a non-zero inductor current, reducing the overall conversion efficiency. This paper presents a ZCD structure that ensures fast and accurate zero-crossing detection of the inductor current by checking the drain-source voltage of the low-side switch. The proposed offset correction technique acts on the body voltage of two NMOS of the comparator, sensing the output current of a differential pair during the first phase. In the comparison phase, the corrected body voltage value is stored in a holding capacitor, drastically lowering the ZCD input referred offset. The effectiveness of this technique has been proved with transistor-level simulation in a BCD technology with 180nm CMOS. The input referred offset of the same ZCD topology, implemented with and without the proposed correction method, has been reduced by about a factor of 30
Digital Autotuning System for Inductor Current Sensing in Voltage Regulation Module Applications
No full textInductor current sensing is becoming widely used in current programmed controllers for microprocessor applications. This method exploits a low-pass filter in parallel with the inductor to provide lossless current sense. A major drawback of inductor current sensing is that accurate sense the dc and ac components of the current signal requires precise matching between the low-pass filter time constant and the inductor time constant (L/RL). However, matching accuracy depends on the tolerance of the components and on the operating conditions; therefore it can hardly be guaranteed. To overcome this problem, a novel digital autotuning system is proposed that automatically compensates any time constant mismatch. This autotuning system has been developed for voltage regulator module (VRM) current programmed controllers. It makes it possible to meet the adaptive voltage positioning requirements using conventional and low cost components, and to solve problems such as aging effects, temperature variations, and process tolerances as well. A prototype of the autotuning system based on a field-programmable gate array and a commercial dc/dc controller has been designed and tested. The experimental results fully confirmed the effectiveness of the proposed method, showing an improvement of the current sense precision from about 30% up to 4%. This innovative solution is suitable to fulfill the challenging accuracy specifications required by the future VRM applications
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
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