130,816 research outputs found

    Implementation of a bidimensional compressor for a high-energy physics experiment

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    CARLOSv3 is the third version of a chip that plays a significant role in the data acquisition chain of the A Large Ion Collider Experiment (ALICE) silicon drift detector (SDD). ALICE is one of the foremost high-energy physics experiments (HEPE) conducted within the Large Hadron Collider at CERN, the European Organization for Nuclear Research in Geneva. CARLOSv3 was principally designed and built for the on-line compression of the input dataset originating from a physical bidimensional silicon sensor. To compress a bidimensional dataset, a bidimensional data compressor was required. The compressor was designed for the ALICE SDD Experiment but could be applied to all experiments in which an incoming stream dataset originates from a bidimensional sensor. (20 refs)

    Evaluation of a wavelet-based compression algorithm applied to the silicon drift detectors data of the ALICE experiment at CERN

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    This paper evaluates the performances of a wavelet-based compression algorithm applied to the data produced by the silicon drift detectors of the ALICE experiment at CERN. This compression algorithm is a general purpose lossy technique, in other words, its application could prove useful even on a wide range of other data reduction's problems. In particular the design targets relevant for our wavelet- based compression algorithm are the following ones: a high- compression coefficient, a reconstruction error as small as possible and a very limited execution time. Interestingly, the results obtained are quite close to the ones achieved by the algorithm implemented in the first prototype of the chip CARLOS, the chip that will be used in the silicon drift detectors readout chain

    Design and Construction of an ALICE SDD End-Ladder Prototype Board

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    The paper explains the design and the construction of a prototype of an End_Ladder card for the ALICE SDD experiment. The final End_ladder card will receive an input dataset from the front-end electronics and will transmit the elaborated dataset through an optical channel to the counting room. The proposed prototype card includes an actual ALICE SDD End_ladder prototype card with all the components foreseen for the final version. This is designed together with an external larger card with all the testing equipment required for measurements in lab. The End-Ladder card matches the final dimensions while the external larger one provides all the connectors and an optical receiver mirror unit for an easy-to-use complete system. The final optical modules are provided into the End_Ladder prototype card and are composed of 2-photodiodes and 1-laser single-mode 1310nm with their single mode fibers. Once the front end dataset enters the prototype, a small size digital rad-hard chip caries out a bidimensional compression and acts as a JTAG switch for the front end electronics. The incoming dataset is then compressed, packed, serialized and output via a 800Mb/s optical link to the external receiver card of the prototype. The mirror receiver card deserializes the stream and re-constructs the original dataset before being compressed

    Test of the end-ladder prototype board of the ALICE SDD experiment

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    The paper presents an end-ladder card prototype of the data acquisition chain of the ALICE SDD experiment. The prototype includes most of the electronics devices that will be applied to ALICE SDD experiment. The card interfaces with the front-end electronics and with the counting room detector data link via the interface card named CARLOS_rx. The end_ladder PCB has been fully tested by providing control signals and input vectors via a pattern generator and by collecting output data via the detector data link

    MeSH term explosion and author rank improve expert recommendations

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    Information overload is an often-cited phenomenon that reduces the productivity, efficiency and efficacy of scientists. One challenge for scientists is to find appropriate collaborators in their research. The literature describes various solutions to the problem of expertise location, but most current approaches do not appear to be very suitable for expert recommendations in biomedical research. In this study, we present the development and initial evaluation of a vector space model-based algorithm to calculate researcher similarity using four inputs: 1) MeSH terms of publications; 2) MeSH terms and author rank; 3) exploded MeSH terms; and 4) exploded MeSH terms and author rank. We developed and evaluated the algorithm using a data set of 17,525 authors and their 22,542 papers. On average, our algorithms correctly predicted 2.5 of the top 5/10 coauthors of individual scientists. Exploded MeSH and author rank outperformed all other algorithms in accuracy, followed closely by MeSH and author rank. Our results show that the accuracy of MeSH term-based matching can be enhanced with other metadata such as author rank

    Design and Realization of an ALICE SDD End-Ladder Prototype

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    The paper presents the last version of a rad-hard digital chip together with a full end-ladder card prototype of the data acquisition (DAQ) chain of the ALICE SDD experiment. The chip has been designed and constructed using a rad-hard digital library provided by CERN. The end-ladder card includes all the electronic devices foreseen for the DAQ chain of ALICE SDD experiment. Moreover the card interfaces with the front-end electronics and with the counting room detector data link (DDL). Particularly, the end-ladder card prototype has been designed taking into account the constraints on the dimensions of the final apparatus

    Design, Realization and Test of a Rad-Hard 2D-compressor and Packing Chip for High Energy Physics Experiments

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    CARLOSv3 is a third version of a chip that plays a significant role in the data acquisition chain of the A Large Ion Collider Experiment Inner Tracking System experiment. It has been designed and realized with a 0.25 mm CMOS 3-metal rad-hard digital library. The chip elaborates and compresses, by means of a bi-dimensional compressor, data belonging to a so-called event. The compressor looks for cross-shaped clusters within the whole data set coming from the silicon detector. To test the chip a specific PCB has been designed; it contains the connectors for probing the ASIC with a pattern generator and a logic state analyzer. The chip is inserted on the PCB using a ZIF socket. This allows to test the 35 packaged samples out of the total amount of bare chips we have from the foundry. The test phase has shown that 32 out of 35 chips under test work well. It is planned to redesign a new version of the chip by adding extra features and to submit the final version of CARLOS upon the final DAQ chain will be totally tested both in Bologna and at CERN

    Design and Construction of an End-Ladder Prototype Board with a 2D HW compressor

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    This paper explains the design and the construction of the prototype of an end-ladder card for the silicon drift detector of a high-energy physics experiment at CERN. The end-ladder performs data reduction, compression, and packing for a data acquisition chain. In particular, the end-ladder card includes a chip whose main function is to execute these tasks. Besides the chip’s functions, the end-ladder card interfaces with the front-end electronics and processes and transmits the data set received from the front end through an optical channel to the counting room. The paper also describes this chip and the ongoing tests on its production. In addition, the paper shows details of the end-ladder prototype card’s design and of the relative tests that are going to be carried out in the near future
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