1,720,991 research outputs found
A modular Vedic multiplier architecture for model-based design and deployment on FPGA platforms
No full textMultiplication is a fundamental operation in most signal and image processing applications. In this paper, a new architecture for a Vedic multiplier implementing ‘Urdhava-tiryakbhyam’ methodology is proposed. The presented architecture is completely modular and is conceived to be implemented in model-based designs where the configurability is of utmost importance. This architecture is prone to be implemented both as pure combinational and pipelined fashion to fit the needed frequency clock. The proposed multiplier exploits 4:2 compressor blocks instead of standard full-adders. Five different 4:2 compressor architectures from literature have been compared. The designs are developed as model-based schemes in SIMULINK and then automatically coded in VHDL (Very High-speed Integrated Circuits Hardware Description Language) through the HDL coder of MATLAB. The code is synthetized on an Artix 7 FPGA (Field Programmable Gate Array) and performances are evaluated in terms of area occupancy (i.e., LUTs number) and propagation delay (i.e., output time). Results show that despite the achieved configurability and modular architecture, the proposed solution performs equally or in some cases even better compared to solutions already presented in literature
A model‐based design floating‐point accumulator. Case of study: FPGA implementation of a support vector machine kernel function
Full text linkRecent research in wearable sensors have led to the development of an advanced platform capable of embedding complex algorithms such as machine learning algorithms, which are known to usually be resource‐demanding. To address the need for high computational power, one solution is to design custom hardware platforms dedicated to the specific application by exploiting, for example, Field Programmable Gate Array (FPGA). Recently, model‐based techniques and automatic code generation have been introduced in FPGA design. In this paper, a new model‐based floating‐point accumulation circuit is presented. The architecture is based on the state‐of‐the‐art delayed buffering algorithm. This circuit was conceived to be exploited in order to compute the kernel function of a support vector machine. The implementation of the proposed model was carried out in Simulink, and simulation results showed that it had better performance in terms of speed and occupied area when compared to other solutions. To better evaluate its figure, a practical case of a polynomial kernel function was considered. Simulink and VHDL post‐implementation timing simulations and measurements on FPGA confirmed the good results of the stand‐alone accumulator
Study of a synchronization system for distributed inverters conceived for FPGA devices
Full text linkIn a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is presented. Each of the inverters, connected in parallel, is conceived to be equipped with an FPGA that controls the Pulse-Width Modulation (PWM) waveform without intercommunication with the others. The hardware implemented is the same for every inverter; therefore, the addition of a new module does not require redesign, enhancing system modularity. The system has been simulated in a Simulink environment. To study its behavior and to improve the control method, simulations with two parallel-connected inverters have been firstly conducted, then additional simulations have been performed with increasing complexity to demonstrate the quality of the algorithm. The results prove the ability of the method proposed to limit the circulating currents to negligible values
Activation Energy of the Early Stages of Electromigration in Al-1%Si/TiN/Ti Bamboo Lines
No full textThe activation energy of electromigration
in "bamboo" type, passivated Al-1\%Si/TiN/Ti lines was determined by means of high-resolution resistance measurements at wafer level. Both very early stages, with a non linear behaviour of the resistance, and following stages, characterized by an approximately constant rate of resistance change, were analyzed with an existing model that correlates electromigration and mechanical stress evolution. An activation energy could be extracted only in the phase of linear resistance increase, where a value of 0.95eV was found. Diffusion at the interface between Al-Si and the barrier metal or the passivation could be responsible for this value of the activation energy
Electromigration Testing of Integrated Circuit Interconnections
No full textThe electromigration phenomenon has been one of the most intriguing physical problems in the semiconductor device reliability. The models to explain the phenomenon are here revised, together with the influence of materials and their microstructure. The various measuring techniques are described, including the design of special test patterns, and statistical data analysis is briefly reviewed
A flexible machine learning based framework for state of charge evaluation
No full textBatteries State-of-Charge (SoC) must be accurately monitored for safe battery operations, and to extend battery life. Machine Learning (ML) algorithms allow to perform the SoC estimation on a data-based approach, avoiding the need for a physical model for each different battery. In this work, a new ML-based framework for the SoC evaluation is proposed, exploiting constant current discharges for model training, rather than the commonly exploited standard drive cycle profiles. This allows avoiding the conversion processes from the drive cycles vehicle acceleration set-point into a current profile, which lead to vehicle-dependent data and the need for a conversion tool. Currents, voltages and temperatures related to different current discharge rates were measured for a Panasonic 18650 Lithium-Ion battery cell. These data were used to train and optimize a Support Vector Regression (SVR) model in the MATLAB environment. Subsequently, different data were combined together to emulate a real vehicle discharge process and were used for evaluating the model. A Root Mean Square Error (RMSE) of 0.564% was obtained, proving that the SVR model trained with constant current discharges data has been capable to estimate the SoC of the tested drive cycles operations
Electromigration in thin-films for microelectronics
No full textElectromigration (EM) is one of the major concerns for the development of ULSI divices, but not all the aspects of the phenomenon are presently well understood. In this paper well established results and unsolved problems are reviewed and discussed. First, the physical model and in particular the influence of the mechanical stress on EM is considered. Then, the various techniques used to characterize electromigration are analyzed, making distinction between traditional techniques (median time to failure technique and resistometric methods) and more recently developed methods (high-resolution resistometric techniques and low-frequency noise measurement), also considering the fast techniques used for metallisation testing in the industrial environment. Finally, a section is devoted to the problem of test-structure and test-procedure standardisation in EM experiments
Non-Linear Resistance Behavior in the Early Stages and After Electromigration in Al-Si lines
No full textA common result obtained in electromigration experiments carried out on Al-Si lines using different high resolution resistometric methods, is a monotonous non-linear resistance increase at the very beginning of the high current electromigration test, and a decrease after the high stressing current is switched off. These effects have often been attributed to the attainment of a steady state of vacancy concentration during and after electromigration. This paper shows how even small abrupt temperature steps, always present at the beginning and after electromigration tests, are the triggering events for different, often reversible, physical phenomena contributing to non-linear resistance changes. Precipitation–dissolution of alloyed elements appears to be the most significant one. Abrupt temperature changes also induce a change of the hydrostatic stress of passivated lines. The relaxation of the hydrostatic stress could be coupled with a void volume change, and the total resistance is a function of both the hydrostatic stress ~through resistivity! and of void volume. However, we demonstrate that in our experiments the effect of hydrostatic stress relaxation on resistance variations is negligible with respect to the action of precipitation–dissolution. These non-linear, thermally induced effects, however, do not exclude possible simultaneous resistance changes due to the accumulation/relaxation of the electromigration damage. Experimental results are collected by means of different, complementary techniques
A proposal for a standard procedure for moderately accelerated electromigration tests on metal lines
No full textThis work is aimed at proposing a standard procedure for moderately accelerated Electromigration (EM) tests applied to interconnection lines of the present and the next future generation of integrated circuits. The procedure has been tested on one metal level test structures using an Al-alloy metallization scheme, but can be easily applied to other materials as well as to metal lines with vias. Di erent existing standards have been taken into consideration to define this proposal: ASTM F1260-89, JEDEC JESD33-A, JESSI AC41. In the PROPHECY project, the focus was on wafer level reliability evaluation with fast methods, but fast EM methods using extremely accelerated stress conditions usually induce side-e ects which can invalidate the results. As a consequence, this procedure suggests the use of moderately accelerated tests, together with a method for reducing the number of tests needed for a complete EM characterization. This procedure gives advice on the test structures to be used and on the preliminary steps to be performed before the EM tests. A measurement system, complying with the requirements of this procedure, is also brie ̄y described. The methods described in this document apply to both package- and wafer-level
measurements. In order to validate this procedure, EM tests have been performed on JESSI AC41 specimens
Activation energy in the early stage of electromigration in Al-1% Si/TiN/Ti bamboo lines
No full textThe activation energy of electromigration in 'bamboo'-type, passivated Al-I%SMNfri lines was determined by means of high resolution resistance measurements at wafer level. Both the veiy early stages, with a nonlinear behaviour of the resistance, and the subsequent stages, characterized by an approximate!y constant rate of resistance change, were analysed with an existing model that correlates electromigration and mechanical stress evolution. An activation energy could be extracted only in the phase of linear resistance increase, where a value of 0.95 eV was found. Diffusion at the interface between AlSi and the barrier metal or the passivation could be responsible for this value of the activation energy
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