16 research outputs found

    Fabrication and characterization of metallic, two-dimensional dopant δ-layers in silicon

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    With the recent advances of deterministic atomic-scale patterning of phosphorous and arsenic on silicon, proposed architectures for silicon-based quantum computation are close to being realized. For future scalable devices, the role of atomically abrupt `delta' layer interfaces will be critical to device operation, so a further understanding is required in the two-dimensional (2D) physics involved. This thesis discusses a broad range of characterization methods that are employed to measure the properties of buried, 2D dopant δ-layers in silicon, whilst also developing a new method of resistless extreme ultra-violet (EUV) lithography on hydrogen passivated silicon. The first results chapter discusses the optimal method for quantifying secondary ion mass spectrometry (SIMS) depth profile measurements and the progress made towards standardizing scanning tunnelling microscopy (STM) based hydrogen desorption lithography at UCL. We then demonstrate that photoemission electron microscopy (PEEM) can be used to laterally image atomically-thin phosphorous and arsenic δ-layer patterns buried in silicon, with a minimum feature size of 25 nm. The second results chapter establishes the use of synchrotron radiation in the EUV range to desorb hydrogen on the Si(001)-(2x1):H surface. Using x-ray photoelectron spectroscopy (XPS) and STM data, we develop a method to quantify the surface dangling bond density, where the data reveals that the desorption mechanism is associated with valence band excitations mediated via secondary electrons. The third results chapter shows the first soft x-ray angle-resolved photoemission spectroscopy (SX-ARPES) measurements of phosphorous and arsenic δ-layers in silicon. We demonstrate that by measuring the kz extension of the out-of-plane valleys, this offers by far the most sensitive probe of electronic two-dimensionality of silicon δ-layers yet achieved. We found that arsenic δ-layers exhibit considerably more electronic two-dimensionality than their phosphorus counterparts and also measure the absolute charge densities, relative occupancies and donor sub-band minima of the δ-layers, which yield an excellent corroboration with theoretical predictions

    On the sensitivity of convergent beam low energy electron diffraction patterns to small atomic displacements

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    Multiple scattering simulations are developed and applied to assess the potential of convergent beam low-energy electron diffraction (CBLEED) to distinguish between various reconstructions of the Si(001) surface. This is found to be readily achievable through changes in pattern symmetry. A displacement R-factor approach is used to incorporate the angular content of CBLEED discs and identify optimal energy ranges for structure refinement. Defining a disc R-factor, optimal diffraction orders are identified which demonstrate an enhanced sensitivity to small atomic displacements. Using this approach, it was found that respective dimer height and length displacements as small as ±0.06 Å and ±0.20 Å could be detected

    Spatially Resolved Dielectric Loss at the Si/SiO2 Interface

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    The Si=SiO2 interface is populated by isolated trap states that modify its electronic properties. These traps are of critical interest for the development of semiconductor-based quantum sensors and computers, as well as nanoelectronic devices. Here, we study the electric susceptibility of the Si=SiO2 interface with nm spatial resolution using frequency-modulated atomic force microscopy. The sample measured here is a patterned dopant delta layer buried 2 nm beneath the silicon native oxide interface. We show that charge organization timescales of the Si=SiO2 interface range from 1–150 ns, and increase significantly around interfacial traps. We conclude that under time-varying gate biases, dielectric loss in metal-insulatorsemiconductor capacitor devices is in the frequency range of MHz to sub-MHz, and is highly spatially heterogeneous over nm length scales

    Spatially resolved dielectric loss at the Si/SiO2_2 interface

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    The Si/SiO2_2 interface is populated by isolated trap states which modify its electronic properties. These traps are of critical interest for the development of semiconductor-based quantum sensors and computers, as well as nanoelectronic devices. Here, we study the electric susceptibility of the Si/SiO2_2 interface with nm spatial resolution using frequency-modulated atomic force microscopy to measure a patterned dopant delta-layer buried 2 nm beneath the silicon native oxide interface. We show that surface charge organization timescales, which range from 1-150 ns, increase significantly around interfacial states. We conclude that dielectric loss under time-varying gate biases at MHz and sub-MHz frequencies in metal-insulator-semiconductor capacitor device architectures is highly spatially heterogeneous over nm length scales. Supplemental GIFs can be found at https://doi.org/10.6084/m9.figshare.2554668

    Single‐Atom Control of Arsenic Incorporation in Silicon for High‐Yield Artificial Lattice Fabrication

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    Artificial lattices constructed from individual dopant atoms within a semiconductor crystal hold promise to provide novel materials with tailored electronic, magnetic, and optical properties. These custom-engineered lattices are anticipated to enable new, fundamental discoveries in condensed matter physics and lead to the creation of new semiconductor technologies including analog quantum simulators and universal solid-state quantum computers. This work reports precise and repeatable, substitutional incorporation of single arsenic atoms into a silicon lattice. A combination of scanning tunneling microscopy hydrogen resist lithography and a detailed statistical exploration of the chemistry of arsine on the hydrogen-terminated silicon (001) surface are employed to show that single arsenic dopants can be deterministically placed within four silicon lattice sites and incorporated with 97 ± 2% yield. These findings bring closer to the ultimate frontier in semiconductor technology: the deterministic assembly of atomically precise dopant and qubit arrays at arbitrarily large scales

    Single-Atom Control of Arsenic Incorporation in Silicon for High-Yield Artificial Lattice Fabrication

    No full text
    Artificial lattices constructed from individual dopant atoms within a semiconductor crystal hold promise to provide novel materials with tailored electronic, magnetic, and optical properties. These custom engineered lattices are anticipated to enable new, fundamental discoveries in condensed matter physics and lead to the creation of new semiconductor technologies including analog quantum simulators and universal solid-state quantum computers. In this work, we report precise and repeatable, substitutional incorporation of single arsenic atoms into a silicon lattice. We employ a combination of scanning tunnelling microscopy hydrogen resist lithography and a detailed statistical exploration of the chemistry of arsine on the hydrogen terminated silicon (001) surface, to show that single arsenic dopants can be deterministically placed within four silicon lattice sites and incorporated with 97±\pm2% yield. These findings bring us closer to the ultimate frontier in semiconductor technology: the deterministic assembly of atomically precise dopant and qubit arrays at arbitrarily large scales

    Atomic-Scale Patterning of Arsenic in Silicon by Scanning Tunneling Microscopy

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    Over the past two decades, prototype devices for future classical and quantum computing technologies have been fabricated by using scanning tunneling microscopy and hydrogen resist lithography to position phosphorus atoms in silicon with atomic-scale precision. Despite these successes, phosphine remains the only donor precursor molecule to have been demonstrated as compatible with the hydrogen resist lithography technique. The potential benefits of atomic-scale placement of alternative dopant species have, until now, remained unexplored. In this work, we demonstrate the successful fabrication of atomic-scale structures of arsenic-in-silicon. Using a scanning tunneling microscope tip, we pattern a monolayer hydrogen mask to selectively place arsenic atoms on the Si(001) surface using arsine as the precursor molecule. We fully elucidate the surface chemistry and reaction pathways of arsine on Si(001), revealing significant differences to phosphine. We explain how these differences result in enhanced surface immobilization and in-plane confinement of arsenic compared to phosphorus, and a dose-rate independent arsenic saturation density of 0.24 ± 0.04 monolayers. We demonstrate the successful encapsulation of arsenic delta-layers using silicon molecular beam epitaxy, and find electrical characteristics that are competitive with equivalent structures fabricated with phosphorus. Arsenic delta-layers are also found to offer confinement as good as similarly prepared phosphorus layers, while still retaining >80% carrier activation and sheet resistances of <2 kΩ/square. These excellent characteristics of arsenic represent opportunities to enhance existing capabilities of atomic-scale fabrication of dopant structures in silicon, and may be important for three-dimensional devices, where vertical control of the position of device components is critical

    Resistless EUV lithography: Photon-induced oxide patterning on silicon

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    In this work, we show the feasibility of extreme ultraviolet (EUV) patterning on an HF-treated silicon (100) surface in the absence of a photoresist. EUV lithography is the leading lithography technique in semiconductor manufacturing due to its high resolution and throughput, but future progress in resolution can be hampered because of the inherent limitations of the resists. We show that EUV photons can induce surface reactions on a partially hydrogen-terminated silicon surface and assist the growth of an oxide layer, which serves as an etch mask. This mechanism is different from the hydrogen desorption in scanning tunneling microscopy–based lithography. We achieve silicon dioxide/silicon gratings with 75-nanometer half-pitch and 31-nanometer height, demonstrating the efficacy of the method and the feasibility of patterning with EUV lithography without the use of a photoresist. Further development of the resistless EUV lithography method can be a viable approach to nanometer-scale lithography by overcoming the inherent resolution and roughness limitations of photoresist materials

    Resistless EUV lithography: Photon-induced oxide patterning on silicon

    No full text
    In this work, we show the feasibility of extreme ultraviolet (EUV) patterning on an HF-treated silicon (100) surface in the absence of a photoresist. EUV lithography is the leading lithography technique in semiconductor manufacturing due to its high resolution and throughput, but future progress in resolution can be hampered because of the inherent limitations of the resists. We show that EUV photons can induce surface reactions on a partially hydrogen-terminated silicon surface and assist the growth of an oxide layer, which serves as an etch mask. This mechanism is different from the hydrogen desorption in scanning tunneling microscopy-based li-thography. We achieve silicon dioxide/silicon gratings with 75-nanometer half-pitch and 31-nanometer height, demonstrating the efficacy of the method and the feasibility of patterning with EUV lithography without the use of a photoresist. Further development of the resistless EUV lithography method can be a viable approach to nanometer-scale lithography by overcoming the inherent resolution and roughness limitations of photoresist materials
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