1,720,995 research outputs found
Pixel Design Driven Performance Improvement in 4T CMOS Image Sensors: Dark Current Reduction and Full-Well Enhancement
Full text linkDark current (DC) limits the optical performance of CMOS image sensors. The main sources of the DC in a modern submicrometer process are the defects induced by the shallow trench isolation fabrication process steps. In this brief, we present a pixel layout technique to reduce the impact of these defects by removing the trench-oxide between the two adjacent edges of neighboring photodiodes (PDs). This isolation scheme relies only on the p-well layer and provides the further advantage of requiring less area. Hence, a larger PD can be designed, leading to an increased pixel fill factor. Experimental results show that this approach reduces the DC by 21% and increases the linear full well capacity by approximately 9%
Integrating logarithmic wide dynamic range CMOS image sensors
Full text linkComplementary Metal Oxide Semiconductor (CMOS) image sensors are widely used in many applications such as consumer electronics, automotive and security. One of the key requirements in todayâs imaging applications is the ability to capture natural scenes faithfully; a feature known as wide dynamic range (WDR). Current digital image sensors have a linear response that results in saturation and loss of details. Conventional CMOS image sensors with a logarithmic response attempt to address the limited dynamic range of the linear digital image sensors by exploiting the subthreshold operation of a transistor in a pixel. This results in CMOS pixels that are able to capture light intensities of more than six decades (120 dB). However, the approach comes at the expense of high fixed pattern noise (FPN) and slow response.
The work presented in this thesis describes a five all nMOS transistor (5T) pixel architecture that aims to achieve wide dynamic range. This feature is obtained using a time-varying reference voltage that is applied to one of the transistors of the pixel. The reference voltage varies in a logarithmic fashion in order to modulate the effective integration time of the pixel. This allows the pixel to avoid saturation; hence extending the dynamic range. In addition, the slope of the reference voltage that can be adjusted means the pixel response is adaptive and can be more robust towards temporal noise. To have a well-controlled pixel response, the pixel non-ideal effects such as source follower gain, body effect and subthreshold effect are characterised and included as an improved model to the reference voltage.
Measurement results from fabricated chips using UMC 180 nm technology are presented and analysed. A dynamic range of 80 dB with a logarithmic response of 600 mV/decade has been achieved. This is a significant improvement in comparison to that of conventional logarithmic pixel response (60 mV/decade). An analysis of the effect of chip variations that causes FPN has been conducted and correction methods that can reduce the illumination error to less than 2% have been proposed. In addition, the first experimental study comparing different dynamic range extension methods has been performed. In the study, a method to control the response of a WDR approach using a stepped voltage that has achieved a dynamic range of up to 120 dB is also presented. The result of the study leads to a modification to the reference voltage that allows an implementation of an analogue circuit to generate the reference voltage.</p
On collective behaviour of coupled micro/nano electromechanical sensors
Full text linkWith advances in nanotechnology, resonant sensors based on micro/nano electromechanical systems (M/NEMS) have been manufactured utilising a process similar to that of microelectronics. By providing a frequency shift proportional to the mass/stiffness change, these small resonators enable rapid detection of extremely minute changes in mass and force. For example, they can be used to trace the concentration of pathogens. M/NEMS resonators also demonstrate excellent compatibility with electronic circuits, hence offering multi-function and single-chip solutions for next-generation sensing applications. Resonators are coupled to provide extra degrees of freedom for multi-sensing, while reducing a majority of connections required. The collective behaviour of coupled systems gives rise to new sensing methods such as eigenvalue and eigenvector sensing, which exhibit enhanced sensitivity and linearity as opposed to the traditional frequency-shift approach.
However, the mechanisms of coupling have not yet been fully exploited. Coupled micro/nano systems are exposed to several challenges. First, process variability is known to degrade sensor performance. Moreover, the readout and signal processing issues in large arrays have not been addressed. Hence, actuating and testing coupled sensors are expensive and time-consuming. These hurdles can be circumvented using a novel inverse eigenvalue analysis (IEA) method proposed in this thesis, which is capable of characterising coupled systems based on inverse and forward analysis. The method extracts the system matrix, which carries deterministic information about process and sensitivity, by attaching a peripheral electrical resonator to the MEMS array, therefore providing the advantages of simplified actuation, accurate calibration and sensitivity trimming. To explore the ultimate limit of scaling, prototype sensors consisting of different numbers of coupled resonators have been designed, fabricated and tested for sensing. By investigating the unique behaviour of eigenvalues, various approaches have been proposed to enhance the accuracy of inverse eigenvalue sensing in large coupled systems.</p
High performance pixels for CMOS image sensors
Full text linkComplementary Metal-Oxide Semiconductor (CMOS) image sensors are the principal technology employed in commercial image sensing applications. The research interest in these devices
is driven by the high demand of cameras. High-quality imagers are relevant in the mobile devices business and are even more important in the automotive market segment where the image
quality is crucial for safety. However, CMOS image sensors performance can still be improved.
In particular, a leakage current, intrinsic to the process of manufacturing CMOS technology,
reduces the sensitivity in low light and should be minimised. In addition, the capability of the
sensor to collect electrons, known as full well capacity, should be maximised.
The methods proposed in the literature to reduce the leakage current and to increase the full
well capacity are either insufficient or costly as they may require process modifications. To
overcome these limitations, a different approach based on simple layout modifications is proposed. The principal source of leakage current is due to the photodiode isolation. By designing
pixels adjacently, the isolation can be removed thereby reducing the leakage current contribution. In order to maximise the full well capacity, a novel technique is proposed here which
consist in minimising the area reserved to the transistors in the pixel array by sharing the maximum number of diffusions. The result is a pixel with a 50% increase in fill factor compared to
a traditional pixel.
The proposed optimisation strategy results in a staggered pixel arrangement. This may
introduce artefacts in the image when displayed. Hardware-efficient image reconstruction algorithms able to correct the artefacts are presented. Test chips were manufactured to prove the
performance improvement and experimental data showed that the proposed layouts effectively
reduces the leakage current and improved the full well capacity of the presented pixels. In addition, the proposed algorithms are shown to correctly reconstruct and represent the staggered
acquired image on a standard display.</p
Study of mixed mode electro-optical operations of Ge2Sb2Te5
Full text linkChalcogenide based Phase Change Materials are currently of great technological interest in the growing field of optoelectronics. Ge2Sb2Te5 (GST) is the most widely studied phase change material, and it has been commercially used in both optical and electronic data storage applications, due to its ability to switch between two different atomic configurations, at high speed and with low power consumption, as well as its high optical and electrical contrast between amorphous and crystalline states. Despite its well-known optical and electrical properties, the operation in combination of optical and electrical domains has not yet been fully investigated.
This work studies the operation of GST nano-devices exposed to a combination of optical and electrical stimuli or mixed mode by asking, is it possible to electrically measure an optically induced phase change, or vice versa? If so, how do the optical and electrical responses relate to each other, and is it possible to operate GST with a combination of optical and electrical signals? What are the technical constraints that need to be considered in order to fabricate GST devices that could be operated either optically or electrically?
In order to answer these questions, experiments that characterized the optical and electrical responses of GST based nano-devices were performed. It was found that different crystallization mechanisms may have influence in the response, and that the thermal and optical design characteristics of the device play a key role in its operation. Finally a proof of principle, of an opto-electonic memory device that can be read electrically, reset optically and write electrically, is presented. This opens up possibilities for the development of new opto-eloectronic applications such as non-volatile interfaces between future photonics and electronics, high speed optical communication detectors, high speed cameras, artificial retinas and many more.</p
Going Beyond Counting First Authors in Author Co-citation Analysis
Full text linkThe present study examines one of the fundamental aspects of author co-citation analysis (ACA) - the way co-citation
counts are defined. Co-citation counting provides the data on which all subsequent statistical analyses and mappings
are based, and we compare ACA results based on two different types of co-citation counting - the traditional type that
only counts the first one among a cited work's authors on the one hand and a non-traditional type that takes into
account the first 5 authors of a cited work on the other hand. Results indicate that the picture produced through this non-traditional author co-citation counting contains more coherent author groups and is therefore considerably clearer. However, this picture represents fewer specialties in the research field being studied than that produced through the traditional first-author co-citation counting when the same number of top-ranked authors is selected and analyzed. Reasons for these effects are discussed
Variations on the Author
Full text link“Variations on the Author” discusses two of Eduardo Coutinho’s recent films (Um Dia na Vida, from 2010, and Últimas Conversas, posthumously released in 2015) and their contribution to the general question of documentary authorship. The director’s filmography is characterized by a consistent yet self-effacing form of authorial self-inscription: Coutinho often features as an interviewer that rather than express opinions propels discourses; an interviewer that is good at listening. This mode of self-inscription characterizes him as an author who is not expressive but who is nonetheless markedly present on the screen. In Um Dia na Vida, however, Coutinho is completely absent form the image, while Últimas Conversas, on the contrary, includes a confessional prologue that moves the director from the margins to the center of his films. This article examines the ways in which these works stand out in the filmography of a director who offers new insights into the notion of cinematic authorship
Appropriate Similarity Measures for Author Cocitation Analysis
Full text linkWe provide a number of new insights into the methodological discussion about author cocitation analysis. We first argue that the use of the Pearson correlation for measuring the similarity between authors’ cocitation profiles is not very satisfactory. We then discuss what kind of similarity measures may be used as an alternative to the Pearson correlation. We consider three similarity measures in particular. One is the well-known cosine. The other two similarity measures have not been used before in the bibliometric literature. Finally, we show by means of an example that our findings have a high practical relevance.information science;Pearson correlation;cosine;similarity measure;author cocitation analysis
Investigations of time-interpolated single-slope analog-to-digital converters for CMOS image sensors
Full text linkThis thesis presents a study on solutions to high-speed analog-to-digital conversion in CMOS image sensors using time-interpolation methods. Data conversion is one of the few remaining speed bottlenecks in conventional 2D imagers. At the same time, as pixel dark current continues to improve, the resolution requirements on imaging data converters impose very high system-level design challenges. The focus of the presented investigations here is to shed light on methods in Time-to-Digital Converter interpolation of single-slope ADCs. By using high-factor time-interpolation, the resolution of single-slope converters can be increased without sacrificing conversion time or power.
This work emphasizes on solutions for improvement of multiphase clock interpolation schemes, following an all-digital design paradigm. Presented is a digital calibration scheme which allows a complete elimination of analog clock generation blocks, such as PLL or DLL in Flash TDC-interpolated single-slope converters. To match the multiphase clocks in time-interpolated single-slope ADCs, the latter are generated by a conventional open-loop delay line. In order to correct the process voltage and temperature drift of the delay line, a digital backend calibration has been developed. It is also executed online, in-column, and at the end of each sample conversion. The introduced concept has been tested in silicon, and has showed promising results for its introduction in practical mass-production scenarios.
Methods for reference voltage generation in single-slope ADCs have also been looked at. The origins of error and noise phenomenona, which occur during both the discrete and continuous-time conversion phases in a single-slope ADC have been mathematically formalized. A method for practical measurement of noise on the ramp reference voltage has also been presented.
Multiphase clock interpolation schemes are difficult for implementation when high interpolation factors are used, due to their quadratic clock phase growth with resolution. To allow high interpolation factors a time-domain binary search concept with error calibration has been introduced. Although the study being conceptual, it shows promising results for highly efficient implementations, if a solution to stable column-level unit delays can be found. The latter is listed as a matter of future investigations.</p
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