9,032 research outputs found
Behavioral Modeling of IC Ports Including Temperature Effects
Full text linkThe development of temperature-dependent macromodels for digital IC ports is addressed. The proposed modeling approach is based on the theory of discrete-time parametric models and allows one to estimate the model parameters from voltage and current waveforms observed at the ports and to implement the model as a SPICE subcircuit. The proposed technique is validated by applying it to commercial devices described by detailed transistor-level models. The obtained models perform at a good accuracy level and are more efficient than the original transistor-level models
Validation by Measurements of a IC Modeling Approach for SiP Applications
Full text linkThe growing importance of signal integrity (SI) analysis in integrated circuits (ICs), revealed by modern systemin-package methods, is demanding for new models for the IC sub-systems which are both accurate, efficient and extractable by simple measurement procedures. This paper presents the contribution for the establishment of an integrated IC modeling approach whose performance is assessed by direct comparison with the signals measured in laboratory of two distinct memory IC devices. Based on the identification of the main blocks of a typical IC device, the modeling approach consists of a network of system-level sub-models, some of which with already demonstrated accuracy, which simulated the IC interfacing behavior. Emphasis is given to the procedures that were developed to validate by means of laboratory measurements (and not by comparison with circuit-level simulations) the model performance, which is a novel and important aspect that should be considered in the design of IC models that are useful for SI analysi
Behavioral modeling of digital IC input and output ports
Full text linkThis paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for signal integrity simulations and timing analyses. The modeling process is described and applied to the characterization of actual device
Fully Integrated Chen Chaotic Oscillation System
No full textA fully integrated Chen chaotic oscillation system using operational amplifiers (OAs) and multipliers is designed and verified in this paper. Unlike the conventional breadboard-based Chen chaotic system using off-the-shelf discrete components, the fully integrated Chen chaotic oscillation circuit presented in this paper is realized using GlobalFoundries’ 0.18 μm CMOS 1P6M process, and all the circuit components are integrated in a chip. The fully integrated Chen chaotic oscillation system is verified using Cadence IC Design Tools, and the post-layout simulation results indicate that the presented integrated Chen chaotic oscillation system only consumes 148 mW from ± 2.5 V supply voltage, and its chip area is 6.15 mm2
IC- cases.
No full textA: Examples of true negative IC- cases. The left panel shows a normal noncontrast head CT. The right panel shows small old infarcts in the left basal ganglia. B: Examples of false negative IC- cases. The left panel shows a small isodense subdural hematoma along the left frontal convexity. The right panel shows trace subarachnoid hemorrhage along the medial aspect of the left frontal lobe.</p
Studies on epizootiology and pathogenicity of Staphylococcus epidermidis in Tilapia (Oreochromis spp.) cultured in Taiwan.
No full textInduction of apoptosis in tilapia, Oreochromis aureus Steindachner, and in TO-2 cells by Staphylococcus epidermidis.
No full textBlind joint maximum likelihood channel estimation and data detection for SIMO systems
No full textA blind adaptive scheme is proposed for joint maximum likelihood (ML) channel estimation and data detection of single-input multiple-output (SIMO) systems. The joint ML optimisation over channel and data is decomposed into an iterative optimisation loop. An efficient global optimisation algorithm called the repeated weighted boosting search is employed at the upper level to optimally identify the unknown SIMO channel model, and the Viterbi algorithm is used at the lower level to produce the maximum likelihood sequence estimation of the unknown data sequence. A simulation example is used to demonstrate the effectiveness of this joint ML optimisation scheme for blind adaptive SIMO systems
Passive Component Wire Bonding Evaluation in a Hybrid IC Package
No full textAs the IC assembly technology fast developing in the modern electrical industries. Demand of high performance electric product is glowing up day by day. New generation of the hybrid IC assembly package has become the major role recently. In order to prevent the package defects occurring in end customer sites, in this paper we try to improve the IC assembly method by using a totally different process to fix the passive component on a BGA substrate. We found that the passive component can be proceeded the current gold wire bonding process.
In case of the Hybrid BGA with the current passive component attaching process, we can find the thermal effect during the surface mount process. Since the solder can be melt every time during each heating process. Therefore, we plan to improve it without solder attachment. The new improvement is to fix the passive component by a non-conductive thermal cure glue. The glue can be done in one time cure, thus the further process would not influence the quality of passive component.
However in the evaluation experiment, the component coated by Gold is the best choice, but we intend to just put it in a comparison model because of the cost consideration. Both works on passive component coated by Gold and Solder were proved. The customer support for the further study on the real products is suggested
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