2,214 research outputs found
A fading channel simulator implementation based on GPU computing techniques
No full textChannel simulators are powerful tools that permit performance tests of the individual parts of a wireless communication system. This is relevant when new communication algorithms are tested, because it allows us to determine if they fulfill the communications standard requirements. One of these tests consists of evaluating the system performance when a communication channel is considered. In this sense, it is possible to model the channel as an FIR filter with time-varying random coefficients. If the number of coefficients is increased, then a better approach to real scenarios can be achieved; however, in that case, the computational complexity is increased. In order to address this issue, a design methodology for computing the time-varying coefficients of the fading channel simulators using consumer-designed graphic processing units (GPUs) is proposed. With the use of GPUs and the proposed methodology, it is possible for nonspecialized users in parallel computing to accelerate their simulation developments when compared to conventional software. Implementation results show that the proposed approach allows the easy generation of communication channels while reducing the processing time. Finally, GPU-based implementation takes precedence when compared with the CPU-based implementation, due to the scattered nature of the channel. � 2015 R. Carrasco-Alvarez et al
Acute kidney injury after percutaneous edge-to-edge mitral repair
No full textFundación Interhospitalaria para la Investigación Cardiovascular (FIC Foundation) via AbbottArmijo, G., Estevez-Loureiro, R., Carrasco-Chinchilla, F., Arzamendi, D., Fernández-Vázquez, F., Jimenez-Quevedo, P., Freixa, X., Pascual, I., Serrador, A.M., Mesa, D., Alonso-Briales, J.H., Goicolea, J., Hernández-Antolin, R., Fernández-Peregrina, E., Cid Alvarez, A.B., Andraka, L., Cruz-Gonzalez, I., Berenguer, A., Sanchis, J., Diez Gil, J.L., Hernández-García, J.M., Li, C.-H., Benito-González, T., de Agustin, J.A., Avanzas, P., Regueiro, A., Amat-Santos, I., Pan, M., Nombela-Franco, L
S2.Allometry_kelp_forest_fishes_(2013).R
No full text<p>Script analysis (R language) of the academic paper “<strong>Length-weight relationships for 25 kelp forest associated fishes of northern and central Chile</strong>” by <strong>Alejandro Pérez-Matus</strong> (1,2*), <strong>Sergio A. Carrasco</strong> (1), & <strong>Andres Ospina-Alvarez</strong> (2), submitted to Revista de Biología Marina y Oceanografía (2013)</p>
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<p>1. Subtidal Ecology Laboratory, Estación Costera de Investigaciones Marinas, Pontificia Universidad Católica de Chile, Casilla 114-D, Santiago, Chile 2. Centro de Conservación Marina & Departamento de Ecología, Facultad de Ciencias Biológicas, Pontificia Universidad Católica de Chile, Chile<br>* Corresponding author: [email protected]</p>
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Effects of initial conditions and Mach number in the evolution of Richtmyer-Meshkov instabilities
No full textWe present an experimental study of the effects of shock intensity and initial conditions on the evolution of Richtmyer-Meshkov Instabilities (RMI). This study is carried out in a vertical shock tube with a single interface of sulfur-hexafluoride and air. We use combined particle image velocimetry (PIV) and planar laser induced fluorescence (PLIF) to obtain simultaneous measurements of velocity and density. These measurements enable us to determine single- and multi-point statistics of vector, scalar, and combined fields. We use these statistical descriptors to study the evolution of turbulence mixing in RMIs under different Mach numbers and initial conditions
Full-hardware architectures for data-dependent superimposed training channel estimation
No full textChannel estimation based on superimposed training (ST) has been an active research topic around the world in recent years, because it offers similar performance when compared to methods based on pilot assisted transmissions (PAT), with the advantage of a better bandwidth utilization. However, physical implementations of such estimators are still under research, and only few approaches have been reported to date. This is due to the computational burden and complexity involved in the algorithms in conjunction with their relative novelty. In order to determine its suitability for commercial applications, counting with the performance and complexity analysis of the ST approaches is mandatory. This work proposes, at a first time, a full-hardware channel estimator architectures for an ST receiver and for one of its variants, known as data-dependent superimposed training (DDST). The architectures were described using Verilog HDL and implemented in Xilinx Virtex-5 XC5VLX110T FPGA. A fixed-point analysis has been carried out, allowing the design to produce practically equal performance to those achieved with the floating-point models. The synthesis results showed a reduced slices consumption (2%) and frequencies operation of 149 MHz, which allows to conclude that ST/DDST receivers can be utilized in practical developments. � 2011 IEEE
A SDR architecture based on FPGA for multi-standard transmitter
No full textThis paper presents the architecture and implementation of configurable base-band transmitter for software defined radio system. The proposed architecture is capable of generating data-frames for multiple communications standards. The radio parameters can be adjusted on-the-fly: length of data frame, training scheme, transmitter rate, upsampling factor, modulation type and pulse-shaping filter waveform. The configuration is carried out through an interface module via control words. Additionally, it is possible to operate in both continuous and burst data flow. The architecture was described using Verilog HDL and targeted in Altera Stratix V: 5SGXMA7N1F45C1. The implementation results show a reduced consumption of FPGA resources (? 1%) and frequency operation over 224 MHz. � 2013 IEEE
Transcatheter mitral repair for functional mitral regurgitation according to left ventricular function: a real-life propensity-score matched study
No full textPascual, I; Carrasco-Chinchilla, F; Benito-Gonzalez, T; Li, CH; Avanzas, P; Nombela-Franco, L; Pan, M; Frutos, AS; Freixa, X; Trillo-Nouche, R; Hernandez-Antolin, RA; Ikazuriaga, LA; Cruz-Gonzalez, I; Lopez-Minguez, JR; Diez, JL; Berenguer-Jofresa, A; Sanchis, J; Ruiz-Quevedo, V; Urbano-Carrillo, C; Dominguez, JFO; Ortas-Nadal, MR; Navarro, EM; Carrillo, X; Alonso-Briales, JH; Fernandez-Vazquez, F; Serra, LA; Hernandez-Vaquero, D; Jimenez-Quevedo, P; Mesa, D; Rodriguez-Gabella, T; Regueiro, A; Monzonis, AM; Tahoces, LS; Gomez, LR; Trejo-Velasco, B; Becerra-Munoz, VM; Garrote-Coloma, C; Peregrina, EF; Lorca, R; De Agustin, JA; Romero, M; Amat-Santos, IJ; Sabate, M; Alvarez, ABC; Hernandez-Garcia, JM; Gualis, J; Arzamendi, D; Moris, C; Tirado-Conte, G; Sanchez-Recalde, A; Estevez-Loureiro,
Generalized and Customizable Sets in R
No full textWe present data structures and algorithms for sets and some generalizations thereof (fuzzy sets, multisets, and fuzzy multisets) available for R through the sets package. Fuzzy (multi-)sets are based on dynamically bound fuzzy logic families. Further extensions include user-definable iterators and matching functions. (author´s abstract)Series: Research Report Series / Department of Statistics and Mathematic
Architecture based on array processors for data-dependent superimposed training channel estimation
No full textChannel estimation is a challenging problem in wireless communication systems because of users mobility and limited bandwidth. A plethora of methods based on pilot assisted transmissions (PAT) have been proposed in most practical systems to overcome this problem, but with the penalty of extra bandwidth consumption for training. Channel estimation based on superimposed training (ST) has emerged as an alternative in recent years because it saves valuable bandwidth by adding a training periodic sequence to the data signal instead of multiplexing them. However, although ST and one of its variants, known as data dependent ST (DDST), have been an active research topic, only few physical implementations of such estimators have been reported to date. In this work a full-hardware architecture based on array processors (AP) for DDST channel estimation is presented and it is compared with previous approaches. The design was described using Verilog HDL and targeted in Xilinx Virtex-5 XC5VLX110T. The synthesis results showed a slices consumption of 3% and a frequency operation of the 115 MHz. A Monte Carlo simulation demonstrates that the mean square error (MSE) of the channel estimator implemented in hardware is practically the same than the one obtained with the floating-point golden model. The high performance and reduced hardware of the proposed channel estimator allows us to conclude that it can be utilized in practical DDST receivers developments. Zapotitlán 2011 IEEE
Environmental and Parental Influences on Offspring Health and Growth in Great Tits (Parus major)
No full textPMCID: PMC3728352This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited
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